From owner-svn-src-head@freebsd.org Mon Oct 2 14:22:36 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 5B920E40806; Mon, 2 Oct 2017 14:22:36 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 286866A478; Mon, 2 Oct 2017 14:22:36 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v92EMZdX075439; Mon, 2 Oct 2017 14:22:35 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v92EMZxe075438; Mon, 2 Oct 2017 14:22:35 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201710021422.v92EMZxe075438@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Mon, 2 Oct 2017 14:22:35 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r324207 - head/sys/arm64/arm64 X-SVN-Group: head X-SVN-Commit-Author: andrew X-SVN-Commit-Paths: head/sys/arm64/arm64 X-SVN-Commit-Revision: 324207 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 02 Oct 2017 14:22:36 -0000 Author: andrew Date: Mon Oct 2 14:22:35 2017 New Revision: 324207 URL: https://svnweb.freebsd.org/changeset/base/324207 Log: Add a memory barrier to ensure the atomic write is visible to the other CPUs before waking them up. Sponsored by: DARPA, AFRL Modified: head/sys/arm64/arm64/mp_machdep.c Modified: head/sys/arm64/arm64/mp_machdep.c ============================================================================== --- head/sys/arm64/arm64/mp_machdep.c Mon Oct 2 14:19:31 2017 (r324206) +++ head/sys/arm64/arm64/mp_machdep.c Mon Oct 2 14:22:35 2017 (r324207) @@ -236,7 +236,10 @@ release_aps(void *dummy __unused) atomic_store_rel_int(&aps_ready, 1); /* Wake up the other CPUs */ - __asm __volatile("sev"); + __asm __volatile( + "dsb ishst \n" + "sev \n" + ::: "memory"); printf("Release APs\n");