From owner-p4-projects@FreeBSD.ORG Tue Jun 8 01:51:46 2004 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id EFD7F16A4D2; Tue, 8 Jun 2004 01:51:45 +0000 (GMT) Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id BBBAF16A4CE for ; Tue, 8 Jun 2004 01:51:45 +0000 (GMT) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 95E5B43D46 for ; Tue, 8 Jun 2004 01:51:45 +0000 (GMT) (envelope-from jmallett@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.12.11/8.12.11) with ESMTP id i581pj5S097916 for ; Tue, 8 Jun 2004 01:51:45 GMT (envelope-from jmallett@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.12.11/8.12.11/Submit) id i581pjlT097907 for perforce@freebsd.org; Tue, 8 Jun 2004 01:51:45 GMT (envelope-from jmallett@freebsd.org) Date: Tue, 8 Jun 2004 01:51:45 GMT Message-Id: <200406080151.i581pjlT097907@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to jmallett@freebsd.org using -f From: Juli Mallett To: Perforce Change Reviews Subject: PERFORCE change 54385 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 08 Jun 2004 01:51:47 -0000 http://perforce.freebsd.org/chv.cgi?CH=54385 Change 54385 by jmallett@jmallett_oingo on 2004/06/08 01:51:10 Set up compare, seems to make mips64emul fire interrupts. Affected files ... .. //depot/projects/mips/sys/mips/sgimips/clock.c#6 edit Differences ... ==== //depot/projects/mips/sys/mips/sgimips/clock.c#6 (text+ko) ==== @@ -66,6 +66,7 @@ panic("cannot init clock for type %d", mach_type); } tc_init(&sgimips_timecounter); + mips_wr_compare(mips_rd_count() + curcpu()->ci_cycles_per_hz); mips_wr_status(mips_rd_status() | MIPS_SR_INT_IE | MIPS_INT_MASK_5); }