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From: Aleksandr Rybalko <ray@FreeBSD.org>
Date: Sat, 16 Mar 2013 16:41:46 +0000 (UTC)
To: src-committers@freebsd.org, svn-src-projects@freebsd.org
Subject: svn commit: r248376 - projects/efika_mx/sys/arm/freescale/imx
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Author: ray
Date: Sat Mar 16 16:41:46 2013
New Revision: 248376
URL: http://svnweb.freebsd.org/changeset/base/248376

Log:
  Fix indentation.

Modified:
  projects/efika_mx/sys/arm/freescale/imx/imx51_ssireg.h

Modified: projects/efika_mx/sys/arm/freescale/imx/imx51_ssireg.h
==============================================================================
--- projects/efika_mx/sys/arm/freescale/imx/imx51_ssireg.h	Sat Mar 16 16:39:00 2013	(r248375)
+++ projects/efika_mx/sys/arm/freescale/imx/imx51_ssireg.h	Sat Mar 16 16:41:46 2013	(r248376)
@@ -107,15 +107,15 @@
 #define		SSI_SRCR_RFSL		(1 << 1) /* RX Frame Sync Length */
 #define		SSI_SRCR_REFS		(1 << 0) /* RX Early Frame Sync */
 
-#define		IMX51_SSI_STCCR_REG	0x0024 /* TX Clock Control */
-#define		IMX51_SSI_SRCCR_REG	0x0028 /* RX Clock Control */
+#define	IMX51_SSI_STCCR_REG	0x0024 /* TX Clock Control */
+#define	IMX51_SSI_SRCCR_REG	0x0028 /* RX Clock Control */
 #define		SSI_SXCCR_DIV2		(1 << 18) /* Divide By 2 */
 #define		SSI_SXCCR_PSR		(1 << 17) /* Prescaler Range */
-#define		SSI_SXCCR_WL_MASK		0x0001e000
+#define		SSI_SXCCR_WL_MASK	0x0001e000
 #define		SSI_SXCCR_WL_SHIFT	13 /* Word Length Control */
-#define		SSI_SXCCR_DC_MASK		0x00001f00
+#define		SSI_SXCCR_DC_MASK	0x00001f00
 #define		SSI_SXCCR_DC_SHIFT	8 /* Frame Rate Divider */
-#define		SSI_SXCCR_PM_MASK		0x000000ff
+#define		SSI_SXCCR_PM_MASK	0x000000ff
 #define		SSI_SXCCR_PM_SHIFT	0 /* Prescaler Modulus */
 
 #define	IMX51_SSI_SFCSR_REG	0x002C /* SSI FIFO Control/Status Register */