From owner-freebsd-arch@FreeBSD.ORG Mon Nov 3 08:30:17 2003 Return-Path: Delivered-To: freebsd-arch@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 052D116A4CF for ; Mon, 3 Nov 2003 08:30:17 -0800 (PST) Received: from mail.speakeasy.net (mail6.speakeasy.net [216.254.0.206]) by mx1.FreeBSD.org (Postfix) with ESMTP id 6D32344003 for ; Mon, 3 Nov 2003 08:30:07 -0800 (PST) (envelope-from jhb@FreeBSD.org) Received: (qmail 25313 invoked from network); 3 Nov 2003 16:30:06 -0000 Received: from unknown (HELO server.baldwin.cx) ([216.27.160.63]) (envelope-sender )encrypted SMTP for ; 3 Nov 2003 16:30:06 -0000 Received: from laptop.baldwin.cx (gw1.twc.weather.com [216.133.140.1]) by server.baldwin.cx (8.12.9/8.12.9) with ESMTP id hA3GTgce063379; Mon, 3 Nov 2003 11:29:43 -0500 (EST) (envelope-from jhb@FreeBSD.org) Message-ID: X-Mailer: XFMail 1.5.4 on FreeBSD X-Priority: 3 (Normal) Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 8bit MIME-Version: 1.0 In-Reply-To: <20031101190722.M10222-100000@mail.chesapeake.net> Date: Mon, 03 Nov 2003 11:29:43 -0500 (EST) From: John Baldwin To: Jeff Roberson X-Spam-Checker-Version: SpamAssassin 2.55 (1.174.2.19-2003-05-19-exp) cc: arch@freebsd.org Subject: Re: HEADSUP: New i386 interrupt and SMP code.. X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 Nov 2003 16:30:17 -0000 On 02-Nov-2003 Jeff Roberson wrote: > > On Thu, 30 Oct 2003, John Baldwin wrote: > >> Coming very soon to a CVS tree near you are some very large changes to >> the i386 interrupt and SMP code. New features include: >> >> - Runtime selection of using the I/O APICs or the AT PICs to route >> interrupts. >> - I/O APICs can be used in a UP kernel or on a UP system that >> supplies either an MP Table or ACPI APIC Table. >> - An SMP kernel can run on a UP machine. This means that SMP >> can now be enabled in GENERIC and the SMP kernel config can die. > > The lock prefix is extremely expensive on the P4 systems that I have > measured. It makes lock cmpxchg 150 cycles vs 12. On athlon this is not > such a big deal since it goes to 25 cycles from 12. We should measure the > impact of compiling in the lock prefix on UP P4 systems before making this > the default. > > Otherwise, this all sounds good. Note that one can always compile a custom kernel if one needs it for a specific application, but that this will increase the amount of out-of-box support for i386. This has also been a requested feature for quite a while now. -- John Baldwin <>< http://www.FreeBSD.org/~jhb/ "Power Users Use the Power to Serve!" - http://www.FreeBSD.org/