From owner-freebsd-hackers Tue Oct 14 14:20:07 1997 Return-Path: Received: (from root@localhost) by hub.freebsd.org (8.8.7/8.8.7) id OAA17878 for hackers-outgoing; Tue, 14 Oct 1997 14:20:07 -0700 (PDT) (envelope-from owner-freebsd-hackers) Received: from grayling.erg.sri.com (grayling.erg.sri.com [128.18.4.194]) by hub.freebsd.org (8.8.7/8.8.7) with SMTP id OAA17854 for ; Tue, 14 Oct 1997 14:20:02 -0700 (PDT) (envelope-from templin@erg.sri.com) Received: by grayling.erg.sri.com (8.6.12/2.7davy) id OAA04153; Tue, 14 Oct 1997 14:18:38 -0700 Message-Id: <199710142118.OAA04153@grayling.erg.sri.com> Date: Tue, 14 Oct 1997 14:18:38 -0700 From: "Fred L. Templin" To: freebsd-hackers@freebsd.org, mike@smith.net.au Cc: templin@erg.sri.com Subject: Re: pccard driver questions (FreeBSD 2.2.2-RELEASE + PAO-970616) Sender: owner-freebsd-hackers@freebsd.org X-Loop: FreeBSD.org Precedence: bulk > > You could map a larger window; that'd certainly be better. TBH I > > haven't checked to see if there is a limitation that would prevent you > > from having a 96kB window for your card. > > This would be nice, but I'm somewhat skeptical it will be possible. I'll > certainly check into it with an optimistic viewpoint, however. Unfortunately, the above does not seem to be an option. From the file 'sys/pccard/i82365.h': > /* > * The memory window registers contain the start and end > * physical host address that the PCIC maps to the card, > * and an offset calculated from the card memory address. > * All values are shifted down 12 bits, so allocation is > * done in 4Kb blocks. Only 12 bits of each value is > * stored, limiting the range to the ISA address size of > * 24 bits. The upper 4 bits of the most significant byte > * within the values are used for various flags. > * > * The layout is: > * > * base+0 : lower 8 bits of system memory start address > * base+1 : upper 4 bits of system memory start address + flags > * base+2 : lower 8 bits of system memory end address > * base+3 : upper 4 bits of system memory end address + flags > * base+4 : lower 8 bits of offset to card address > * base+5 : upper 4 bits of offset to card address + flags > * > * The following two bytes are reserved for other use. > */ So, it looks like the 4KB per-window limit is an artifact of the controller chip's register organization. Again, please someone let me know if I'm missing something... Fred templin@erg.sri.com