Date: Sat, 3 Feb 2018 20:55:08 +0000 (UTC) From: Yuri Victorovich <yuri@FreeBSD.org> To: ports-committers@freebsd.org, svn-ports-all@freebsd.org, svn-ports-head@freebsd.org Subject: svn commit: r460847 - in head/cad: . py-pyfda Message-ID: <201802032055.w13Kt8ZN023228@repo.freebsd.org>
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Author: yuri Date: Sat Feb 3 20:55:08 2018 New Revision: 460847 URL: https://svnweb.freebsd.org/changeset/ports/460847 Log: New port: cad/py-pyfda: GUI tool for designing and analysing discrete time filters pyFDA allows to design digital filters for signals in digital signal processing. Screenshot: https://raw.githubusercontent.com/chipmuenk/pyFDA/master/images/pyFDA_screenshot_3.PNG The patching is mostly due to the fact that pyFDA doesn't have an installation procedure, and expects users to just run locally. PR: 222442 Submitted by: myself Approved by: adamw (mentor) Differential Revision: https://reviews.freebsd.org/D14176 Added: head/cad/py-pyfda/ head/cad/py-pyfda/Makefile (contents, props changed) head/cad/py-pyfda/distinfo (contents, props changed) head/cad/py-pyfda/pkg-descr (contents, props changed) Modified: head/cad/Makefile Modified: head/cad/Makefile ============================================================================== --- head/cad/Makefile Sat Feb 3 20:44:10 2018 (r460846) +++ head/cad/Makefile Sat Feb 3 20:55:08 2018 (r460847) @@ -72,6 +72,7 @@ SUBDIR += py-gdspy SUBDIR += py-lcapy SUBDIR += py-pycam + SUBDIR += py-pyfda SUBDIR += python-gdsii SUBDIR += pythoncad SUBDIR += qcad Added: head/cad/py-pyfda/Makefile ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/cad/py-pyfda/Makefile Sat Feb 3 20:55:08 2018 (r460847) @@ -0,0 +1,47 @@ +# $FreeBSD$ + +PORTNAME= pyfda +PORTVERSION= 0.1 +DISTVERSIONSUFFIX= rc6 +CATEGORIES= cad python devel +MASTER_SITES= CHEESESHOP +PKGNAMEPREFIX= ${PYTHON_PKGNAMEPREFIX} + +MAINTAINER= yuri@FreeBSD.org +COMMENT= GUI tool for designing and analysing discrete time filters + +LICENSE= MIT +LICENSE_FILE= ${WRKSRC}/LICENSE + +RUN_DEPENDS= ${PYTHON_PKGNAMEPREFIX}docutils>0:textproc/py-docutils@${FLAVOR} \ + ${PYTHON_PKGNAMEPREFIX}matplotlib>0:math/py-matplotlib@${FLAVOR} \ + ${PYNUMPY} \ + ${PYTHON_PKGNAMEPREFIX}scipy>0:science/py-scipy@${FLAVOR} + +USES= python:3.4+ pyqt:5 +USE_PYTHON= distutils autoplist noflavors +USE_PYQT= core_run gui_run widgets_run +NO_ARCH= yes + +post-extract: + @${MV} ${WRKSRC}/pyfda/pyfda_log.conf ${WRKSRC}/pyfda/pyfda_log.conf.sample + @${MV} ${WRKSRC}/pyfda/pyfda_log_debug.conf ${WRKSRC}/pyfda/pyfda_log_debug.conf.sample + +post-patch: + @${REINPLACE_CMD} -e " \ + s|package_data={'pyfda': \['pyfda_log.conf', 'pyfda_log_debug.conf',|package_data={'pyfda': [|; \ + s|data_files = \[|data_files = [('${PREFIX}/etc', ['pyfda/pyfda_log.conf.sample', 'pyfda/pyfda_log_debug.conf.sample'])|" \ + ${WRKSRC}/setup.py + @${REINPLACE_CMD} -e " \ + s|logging.config.fileConfig(os.path.join(base_dir, rc.log_config_file))|logging.config.fileConfig(os.path.join('${PREFIX}/etc', rc.log_config_file))|" \ + ${WRKSRC}/pyfda/pyfdax.py + @${REINPLACE_CMD} -e " \ + s|'pyfda.log'|'/tmp/pyfda.log'|" \ + ${WRKSRC}/pyfda/*.conf.sample + +post-stage: + @${REINPLACE_CMD} -E " \ + s|(.*\.sample)$$|@sample \1|" \ + ${WRKDIR}/.PLIST.pymodtmp + +.include <bsd.port.mk> Added: head/cad/py-pyfda/distinfo ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/cad/py-pyfda/distinfo Sat Feb 3 20:55:08 2018 (r460847) @@ -0,0 +1,3 @@ +TIMESTAMP = 1505805392 +SHA256 (pyfda-0.1rc6.tar.gz) = 65c09211a860e4ae84715363a4efdf9049c6855e548da17fea5cbbb628925261 +SIZE (pyfda-0.1rc6.tar.gz) = 188694 Added: head/cad/py-pyfda/pkg-descr ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/cad/py-pyfda/pkg-descr Sat Feb 3 20:55:08 2018 (r460847) @@ -0,0 +1,9 @@ +pyFDA is a GUI based tool in Python/Qt for analysing and designing discrete +time filters. The capability for generating Verilog and VHDL code for the +designed and quantized filters will be added in the next release. + +Since the digital filter design is a research area with many unanswered +questions, this project is also a research project. +Please expect freezes in case of some parameter values. + +WWW: https://github.com/chipmuenk/pyFDA
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