From owner-freebsd-arch@FreeBSD.ORG Thu Jun 18 03:04:04 2009 Return-Path: Delivered-To: arch@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E0339106564A; Thu, 18 Jun 2009 03:04:04 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from harmony.bsdimp.com (bsdimp.com [199.45.160.85]) by mx1.freebsd.org (Postfix) with ESMTP id 9B86C8FC0A; Thu, 18 Jun 2009 03:04:04 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from localhost (localhost [127.0.0.1]) by harmony.bsdimp.com (8.14.3/8.14.1) with ESMTP id n5I32vst017215; Wed, 17 Jun 2009 21:02:57 -0600 (MDT) (envelope-from imp@bsdimp.com) Date: Wed, 17 Jun 2009 21:03:18 -0600 (MDT) Message-Id: <20090617.210318.1878034641.imp@bsdimp.com> To: jroberson@jroberson.net From: "M. Warner Losh" In-Reply-To: References: <20090609201127.GA50903@alchemy.franken.de> <4A2F1148.9090706@freebsd.org> X-Mailer: Mew version 5.2 on Emacs 21.3 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Cc: arch@FreeBSD.org, grehan@FreeBSD.org, marius@alchemy.franken.de Subject: Re: Dynamic pcpu, arm, mips, powerpc, sun, etc. help needed X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 18 Jun 2009 03:04:05 -0000 In message: Jeff Roberson writes: : : On Tue, 9 Jun 2009, Peter Grehan wrote: : : >> As for sparc64 allocating the storage for the dynamic area : >> from end probably isn't a good idea as the pmap code assumes : >> that the range from KERNBASE to end is covered by the pages : >> allocated by and locked into the TLB for the kernel by the : >> loader : > : > Ditto for ppc. It's possible to get the additional space from within or : > after return from pmap_bootstrap() (like thread0's kstack, or the msgbuf). : : http://people.freebsd.org/~jeff/dpcpu.diff : : I have updated this patch based on feedback relating to various : architectures md code. I tried to model most architectures after the way : msgbuf memory was taken. I have no capacity to test anything other than : i386 and amd64. ARM is reported to work with one minor diff. Apparently : sparc64 worked with the earlier diff but this should be cleaner. If : anyone can report back on sparc64, mips, or powerpc, I'd appreciate it. I don't understand this part of the patch: Index: mips/mips/mp_machdep.c =================================================================== --- mips/mips/mp_machdep.c (revision 194275) +++ mips/mips/mp_machdep.c (working copy) @@ -224,12 +224,15 @@ static int smp_start_secondary(int cpuid) { struct pcpu *pcpu; + void *dpcpu; int i; if (bootverbose) printf("smp_start_secondary: starting cpu %d\n", cpuid); + dpcpu = (void *)kmem_alloc(kernel_map, DPCPU_SIZE); pcpu_init(&__pcpu[cpuid], cpuid, sizeof(struct pcpu)); + dpcpu_init(dpcpu, cpuid); if (bootverbose) printf("smp_start_secondary: cpu %d started\n", cpuid); So were adding a dynamic per-cpu area, in addition to the fixed part? Warner