Date: Thu, 05 Dec 1996 18:06:50 -0700 From: Steve Passe <smp@csn.net> To: Thomas Pfenning <thomaspf@microsoft.com> Cc: "'Chris Csanady'" <ccsanady@friley216.res.iastate.edu>, "'Peter Wemm'" <peter@spinner.dialix.com>, "'smp@freebsd.org'" <smp@freebsd.org> Subject: Re: make locking more generic? Message-ID: <199612060106.SAA16252@clem.systemsix.com> In-Reply-To: Your message of "Thu, 05 Dec 1996 16:49:30 PST." <c=US%a=_%p=msft%l=RED-81-MSG-961206004930Z-6829@INET-04-IMC.itg.microsoft.com>
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> Hmm, > > but xchgb actually writes a new value into the cache line on each spin > and dirties the cache line? So you are saying, the cache coherence > protocol is smart enough to recognize it is the same value and does not > actually require an update of the cache in a remote CPU spinning on the > same lock. Or is it the xchgb instruction which does not write an 0xff > if it is already there? oh-oh, I didn't read close enough (alot of mail has backed up lately). forget what I said... cache, I couldn't say, it might have a bad effect but what can you do about it? a blocking lock as oppossed to a spin-lock? I think the theory is that the collissions are statistically so short that anything more complex would be a loosing situation. ---- > The other thing I don't quite understand is the use of an atomic memory > operation for the unlock. the atomic move may or may not be necessary. since its a byte there is no chance a misaligned lock being written in 2 bus operations. anyone know? -- Steve Passe | powered by smp@csn.net | FreeBSD -----BEGIN PGP PUBLIC KEY BLOCK----- Version: 2.6.2 mQCNAzHe7tEAAAEEAM274wAEEdP+grIrV6UtBt54FB5ufifFRA5ujzflrvlF8aoE 04it5BsUPFi3jJLfvOQeydbegexspPXL6kUejYt2OeptHuroIVW5+y2M2naTwqtX WVGeBP6s2q/fPPAS+g+sNZCpVBTbuinKa/C4Q6HJ++M9AyzIq5EuvO0a8Rr9AAUR tBlTdGV2ZSBQYXNzZSA8c21wQGNzbi5uZXQ+ =ds99 -----END PGP PUBLIC KEY BLOCK-----
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