Date: Fri, 1 Apr 2011 16:33:12 GMT From: John Baldwin <jhb@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 190861 for review Message-ID: <201104011633.p31GXCN5076070@skunkworks.freebsd.org>
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http://p4web.freebsd.org/@@190861?ac=10 Change 190861 by jhb@jhb_kavik on 2011/04/01 02:29:18 Start hacking on the PCI-PCI bridge driver. Affected files ... .. //depot/projects/pci/sys/dev/pci/pci_pci.c#2 edit .. //depot/projects/pci/sys/dev/pci/pcib_private.h#2 edit Differences ... ==== //depot/projects/pci/sys/dev/pci/pci_pci.c#2 (text+ko) ==== @@ -73,6 +73,7 @@ DEVMETHOD(bus_read_ivar, pcib_read_ivar), DEVMETHOD(bus_write_ivar, pcib_write_ivar), DEVMETHOD(bus_alloc_resource, pcib_alloc_resource), + DEVMETHOD(bus_adjust_resource, pcib_adjust_resource), DEVMETHOD(bus_release_resource, bus_generic_release_resource), DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), @@ -657,6 +658,14 @@ count, flags)); } +int +pcib_adjust_resource(device_t bus, device_t child, int type, struct resource *r, + u_long start, u_long end) +{ + + return (bus_generic_adjust_resource(bus, child, type, r, start, end)); +} + /* * PCIB interface. */ ==== //depot/projects/pci/sys/dev/pci/pcib_private.h#2 (text+ko) ==== @@ -53,12 +53,18 @@ u_int pribus; /* primary bus number */ u_int secbus; /* secondary bus number */ u_int subbus; /* subordinate bus number */ +#ifdef NEW_PCIB + struct rman pmem_rm; /* prefetchable memory window */ + struct rman mem_rm; /* memory window */ + struct rman io_rm; /* I/O port window */ +#else pci_addr_t pmembase; /* base address of prefetchable memory */ pci_addr_t pmemlimit; /* topmost address of prefetchable memory */ pci_addr_t membase; /* base address of memory window */ pci_addr_t memlimit; /* topmost address of memory window */ uint32_t iobase; /* base address of port window */ uint32_t iolimit; /* topmost address of port window */ +#endif uint16_t secstat; /* secondary bus status register */ uint16_t bridgectl; /* bridge control register */ uint8_t seclat; /* secondary bus latency timer */ @@ -74,6 +80,8 @@ int pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value); struct resource *pcib_alloc_resource(device_t dev, device_t child, int type, int *rid, u_long start, u_long end, u_long count, u_int flags); +int pcib_adjust_resource(device_t bus, device_t child, int type, + struct resource *r, u_long start, u_long end); int pcib_maxslots(device_t dev); uint32_t pcib_read_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, int width); void pcib_write_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, uint32_t val, int width);
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