From owner-freebsd-hackers Thu Nov 28 16:38:19 2002 Delivered-To: freebsd-hackers@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 9E66337B401 for ; Thu, 28 Nov 2002 16:38:17 -0800 (PST) Received: from harmony.village.org (rover.bsdimp.com [204.144.255.66]) by mx1.FreeBSD.org (Postfix) with ESMTP id B6AB143E88 for ; Thu, 28 Nov 2002 16:38:16 -0800 (PST) (envelope-from imp@bsdimp.com) Received: from localhost (warner@rover2.village.org [10.0.0.1]) by harmony.village.org (8.12.3/8.12.3) with ESMTP id gAT0cApk066531; Thu, 28 Nov 2002 17:38:10 -0700 (MST) (envelope-from imp@bsdimp.com) Date: Thu, 28 Nov 2002 17:37:35 -0700 (MST) Message-Id: <20021128.173735.63842952.imp@bsdimp.com> To: dirkx@webweaving.org Cc: freebsd-hackers@FreeBSD.ORG, wleiden@xs4all.nl Subject: Re: Understanding PCI intr routing on a Cirrus Logic PD6729 From: "M. Warner Losh" In-Reply-To: <20021129004513.P25692-100000@foem.leiden.webweaving.org> References: <20021128235301.I25692-100000@foem.leiden.webweaving.org> <20021129004513.P25692-100000@foem.leiden.webweaving.org> X-Mailer: Mew version 2.1 on Emacs 21.2 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Sender: owner-freebsd-hackers@FreeBSD.ORG Precedence: bulk List-ID: List-Archive: (Web Archive) List-Help: (List Instructions) List-Subscribe: List-Unsubscribe: X-Loop: FreeBSD.ORG In message: <20021129004513.P25692-100000@foem.leiden.webweaving.org> Dirk-Willem van Gulik writes: : > So something in the cardbus_init() may be needed ? : : A full powercycle seems to change the situation; and does allow for the : card(s) to work with just the csc/func calls. I'm very confused now. I took a look at the datasheet to see how calling cardbus_init() could have had any effect... brgcntl = pci_read_config(dev, CB_PCI_BRIDGE_CTRL, 2); brgcntl |= CB_BCR_WRITE_POST_EN | CB_BCR_MASTER_ABORT; pci_write_config(dev, CB_PCI_BRIDGE_CTRL, brgcntl, 2); The CLPD6729 has a Type 0 header. The effect of these lines are to turn on bits 5 and 7 in the MIN_GNT register (minimum grant time of 40us). I don't see how this happens. pci_write_config(dev, CB_PCI_LEGACY16_IOADDR, 0, 2); According to the datasheet, offset 0x44 is past the registers defined (0-0x3f). pci_write_config(dev, CB_PCI_MEMBASE0, 0, 4); pci_write_config(dev, CB_PCI_MEMLIMIT0, 0, 4); pci_write_config(dev, CB_PCI_MEMBASE1, 0, 4); pci_write_config(dev, CB_PCI_MEMLIMIT1, 0, 4); pci_write_config(dev, CB_PCI_IOBASE0, 0, 4); pci_write_config(dev, CB_PCI_IOLIMIT0, 0, 4); pci_write_config(dev, CB_PCI_IOBASE1, 0, 4); pci_write_config(dev, CB_PCI_IOLIMIT1, 0, 4); This writes 0's 0x20-0x38. This is BAR4, BAR5, CardBus CIS, subsystem id, expansion ROM, CAP ptr and some reserved registers that the datasheet says nothing about. Some of these are read-only even. So after the first power cycle, can you reboot w/o a power cycle? Warner To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hackers" in the body of the message