Date: Sun, 02 Feb 1997 15:32:16 -0700 From: Steve Passe <smp@csn.net> To: Terry Lambert <terry@lambert.org> Cc: davem@jenolan.rutgers.edu (David S. Miller), michaelh@cet.co.jp, netdev@roxanne.nuclecu.unam.mx, roque@di.fc.ul.pt, freebsd-smp@FreeBSD.org, smpdev@roxanne.nuclecu.unam.mx Subject: Re: SMP Message-ID: <199702022232.PAA10876@clem.systemsix.com> In-Reply-To: Your message of "Sun, 02 Feb 1997 14:35:27 MST." <199702022135.OAA08696@phaeton.artisoft.com>
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Hi, --- > Well, Sun generally does things right. I was more concerned with > a number of Intel motherboards where we are seeing APIC_IO problems. > They seem to fail this case. > ... i missed something here, could you clarify exactly what "this case" means as reguards "seeing APIC_IO problems"? --- > I don't know what lists you follow, but just in the past two days, > the has been a person on the FreeBSD SMP list running a motherboard > with "improved cache handling" that seems to be barfing on something > like this when APIC_IO is used... 8-(. "improved cache handling" refers to a cache module that actually works, ie tyan first shipped boards with a defective design, the fix for which was a new, redesigned module. It is my belief that several people are running tyan tomcat IIs with the APIC_IO option enabled. could users confirm this for us? I have a theory about why this particular board is unhappy, but I need further tests run before I can verify anything. But I don't think it has anything to do with interaction of the APIC and cache coherency. -- Steve Passe | powered by smp@csn.net | FreeBSD
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