Date: Sun, 11 Feb 1996 14:57:00 -0700 (MST) From: Terry Lambert <terry@lambert.org> To: bde@zeta.org.au (Bruce Evans) Cc: bde@zeta.org.au, phk@critter.tfs.com, current@FreeBSD.org Subject: Re: calibrating clocks Message-ID: <199602112157.OAA18806@phaeton.artisoft.com> In-Reply-To: <199602111443.BAA13304@godzilla.zeta.org.au> from "Bruce Evans" at Feb 12, 96 01:43:56 am
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> > >You know about the counter in the APIC too ? > > >It runs at the "bus frequency" but that may vary as well :-( > > No. What's an APIC? Advanced Programmable Interrupt Controller. Not all systems have APIC's. Not even all Pentium systems. APIC type Local APIC Integrated APIC Features Version Reg. ---------------------- -------------- -------------------------------------- 82489DX APIC 0x - Integrated APIC, i.e., 1x STARTUP IPI. Refer to Appendix B.4.2 PENTIUM(tm) processors of the Intel Multiprocessor (735\90, 815\100) Specification V1.1 for details. Programmable interrupt input polarity. ---------------------- -------------- -------------------------------------- 'x' is a 4 bit hex number Generally, it is only applicable to MP motherboards, or UP motherboards with specific Pentium revisions that imply internal APIC's. >From the MP Spec: ============================================================================== 3.6.7. APIC Interval Timers The 82489DX APIC local unit contains a 32-bit wide programmable timer with the following two independent clock input sources: 1. The CLK pin provides the clock signal that drives the 82489DX APIC's internal operation. 2. The TMBASE pin allows an independent clock signal to be connected to the 82489DX APIC for use by the timer functions. The interval timers of the integrated [Pentium] APIC have only one clock input source, CLK. To maintain consistency, developers of [MP Spec] compliant systems based on the 82489DX must choose CLK as the source of the 82489DX APIC timer clock. TMBASE must be left disabled. An MP operating system may use the IRQ8 real-time clock as a reference to determine the actual APIC timer clock speed. Special consideration must be made for systems with stop clock (STPCLK#) capability. Timer interrupts are ignored while STPCLK# is asserted. The system time-of-day clock may need to be reset when STPCLK# is deasserted. ============================================================================== You cannot rely on the existance of an APIC on a Pentium. You can not rely on an APIC for timing if it does exist, because of the potential use of STPCLK#. Terry Lambert terry@lambert.org --- Any opinions in this posting are my own and not those of my present or previous employers.
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