Date: Fri, 3 Feb 2012 23:33:39 GMT From: Robert Watson <rwatson@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 205654 for review Message-ID: <201202032333.q13NXdSG098105@skunkworks.freebsd.org>
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http://p4web.freebsd.org/@@205654?ac=10 Change 205654 by rwatson@rwatson_svr_ctsrd_mipsbuild on 2012/02/03 23:32:49 Strip MALTA-specific portions of the BERI machine-dependent functions file. We will add some BERI-specific code here in the future, but not yet. We don't have access to an RTC in simulated or synthesised BERI, currently, so we just go with a default MHz assumption for now. Do use generic MIPS functions for delay timing, interrupt handling, etc. We don't currently require any customisation there as. Affected files ... .. //depot/projects/ctsrd/beribsd/src/sys/mips/beri/beri_machdep.c#2 edit .. //depot/projects/ctsrd/beribsd/src/sys/mips/beri/files.beri#2 edit Differences ... ==== //depot/projects/ctsrd/beribsd/src/sys/mips/beri/beri_machdep.c#2 (text+ko) ==== @@ -22,11 +22,9 @@ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. - * - * $FreeBSD: src/sys/mips/malta/malta_machdep.c,v 1.7 2010/12/09 07:47:40 gonzo Exp $ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/mips/malta/malta_machdep.c,v 1.7 2010/12/09 07:47:40 gonzo Exp $"); +__FBSDID("$FreeBSD$"); #include "opt_ddb.h" @@ -64,111 +62,16 @@ #include <machine/pmap.h> #include <machine/trap.h> -#ifdef TICK_USE_YAMON_FREQ -#include <mips/malta/yamon.h> -#endif - -#ifdef TICK_USE_MALTA_RTC -#include <mips/mips4k/malta/maltareg.h> -#include <dev/mc146818/mc146818reg.h> -#include <isa/rtc.h> -#endif - -#include <mips/malta/maltareg.h> - extern int *edata; extern int *end; -void lcd_init(void); -void lcd_puts(char *); -void malta_reset(void); - -/* - * Offsets to MALTA LCD characters. - */ -static int malta_lcd_offs[] = { - MALTA_ASCIIPOS0, - MALTA_ASCIIPOS1, - MALTA_ASCIIPOS2, - MALTA_ASCIIPOS3, - MALTA_ASCIIPOS4, - MALTA_ASCIIPOS5, - MALTA_ASCIIPOS6, - MALTA_ASCIIPOS7 -}; - void platform_cpu_init() { /* Nothing special */ } -/* - * Put character to Malta LCD at given position. - */ -static void -malta_lcd_putc(int pos, char c) -{ - void *addr; - char *ch; - - if (pos < 0 || pos > 7) - return; - addr = (void *)(MALTA_ASCII_BASE + malta_lcd_offs[pos]); - ch = (char *)MIPS_PHYS_TO_KSEG0(addr); - *ch = c; -} - -/* - * Print given string on LCD. - */ static void -malta_lcd_print(char *str) -{ - int i; - - if (str == NULL) - return; - - for (i = 0; *str != '\0'; i++, str++) - malta_lcd_putc(i, *str); -} - -void -lcd_init(void) -{ - malta_lcd_print("FreeBSD_"); -} - -void -lcd_puts(char *s) -{ - malta_lcd_print(s); -} - -#ifdef TICK_USE_MALTA_RTC -static __inline uint8_t -rtcin(uint8_t addr) -{ - - *((volatile uint8_t *) - MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCADR))) = addr; - return (*((volatile uint8_t *) - MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCDAT)))); -} - -static __inline void -writertc(uint8_t addr, uint8_t val) -{ - - *((volatile uint8_t *) - MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCADR))) = addr; - *((volatile uint8_t *) - MIPS_PHYS_TO_KSEG1(MALTA_PCI0_ADDR(MALTA_RTCDAT))) = val; -} -#endif - -static void mips_init(void) { int i; @@ -214,15 +117,14 @@ /* * Perform a board-level soft-reset. - * Note that this is not emulated by gxemul. + * + * XXXRW: BERI doesn't yet have a board-level soft-reset. */ void platform_reset(void) { - char *c; - c = (char *)MIPS_PHYS_TO_KSEG0(MALTA_SOFTRES); - *c = MALTA_GORESET; + panic("%s: not yet", __func__); } void @@ -237,52 +139,6 @@ } -static uint64_t -malta_cpu_freq(void) -{ - uint64_t platform_counter_freq = 0; - -#if defined(TICK_USE_YAMON_FREQ) - /* - * If we are running on a board which uses YAMON firmware, - * then query CPU pipeline clock from the syscon object. - * If unsuccessful, use hard-coded default. - */ - platform_counter_freq = yamon_getcpufreq(); - -#elif defined(TICK_USE_MALTA_RTC) - /* - * If we are running on a board with the MC146818 RTC, - * use it to determine CPU pipeline clock frequency. - */ - u_int64_t counterval[2]; - - /* Set RTC to binary mode. */ - writertc(RTC_STATUSB, (rtcin(RTC_STATUSB) | RTCSB_BCD)); - - /* Busy-wait for falling edge of RTC update. */ - while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0)) - ; - while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0)) - ; - counterval[0] = mips_rd_count(); - - /* Busy-wait for falling edge of RTC update. */ - while (((rtcin(RTC_STATUSA) & RTCSA_TUP) == 0)) - ; - while (((rtcin(RTC_STATUSA)& RTCSA_TUP) != 0)) - ; - counterval[1] = mips_rd_count(); - - platform_counter_freq = counterval[1] - counterval[0]; -#endif - - if (platform_counter_freq == 0) - platform_counter_freq = MIPS_DEFAULT_HZ; - - return (platform_counter_freq); -} - void platform_start(__register_t a0, __register_t a1, __register_t a2, __register_t a3) @@ -302,7 +158,12 @@ mips_postboot_fixup(); mips_pcpu0_init(); - platform_counter_freq = malta_cpu_freq(); + + /* + * XXXRW: We have no way to compare wallclock time to cycle rate on + * BERI, so for now assume we run at the MALTA default (100MHz). + */ + platform_counter_freq = MIPS_DEFAULT_HZ; mips_timer_early_init(platform_counter_freq); cninit(); ==== //depot/projects/ctsrd/beribsd/src/sys/mips/beri/files.beri#2 (text+ko) ==== @@ -1,1 +1,4 @@ # $FreeBSD$ +mips/beri/beri_machdep.c standard +mips/mips/intr_machdep.c standard +mips/mips/tick.c standard
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