From owner-svn-src-all@FreeBSD.ORG Sun Apr 5 19:53:05 2009 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 7052010656E5; Sun, 5 Apr 2009 19:53:05 +0000 (UTC) (envelope-from xcllnt@mac.com) Received: from asmtpout012.mac.com (asmtpout012.mac.com [17.148.16.87]) by mx1.freebsd.org (Postfix) with ESMTP id 5935D8FC22; Sun, 5 Apr 2009 19:53:05 +0000 (UTC) (envelope-from xcllnt@mac.com) MIME-version: 1.0 Content-transfer-encoding: 7BIT Content-type: text/plain; charset=US-ASCII; format=flowed; delsp=yes Received: from MacBook-Pro.lan.xcllnt.net (mail.xcllnt.net [75.101.29.67]) by asmtp012.mac.com (Sun Java(tm) System Messaging Server 6.3-8.01 (built Dec 16 2008; 32bit)) with ESMTPSA id <0KHN008FQ8JX3N10@asmtp012.mac.com>; Sun, 05 Apr 2009 12:52:46 -0700 (PDT) Message-id: From: Marcel Moolenaar To: Rafal Jaworowski In-reply-to: <7F1FC303-3EFC-4182-9260-FE35C4BD9909@semihalf.com> Date: Sun, 05 Apr 2009 12:52:45 -0700 References: <200904042223.n34MN3RG082677@svn.freebsd.org> <7F1FC303-3EFC-4182-9260-FE35C4BD9909@semihalf.com> X-Mailer: Apple Mail (2.930.3) Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org Subject: Re: svn commit: r190704 - head/sys/powerpc/aim X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 05 Apr 2009 19:53:06 -0000 On Apr 5, 2009, at 2:03 AM, Rafal Jaworowski wrote: >> Log: >> Perform a dummy stwcx. when we switch contexts. The context >> being switched out may hold a reservation. The stwcx. will >> clear the reservation. This is architecturally recommended. >> >> The scenario this addresses is as follows: >> 1. Thread 1 performs a lwarx and as such holds a reservation. >> 2. Thread 1 gets switched out (before doing the matching >> stwcx.) and thread 2 is switched in. >> 3. Thread 2 performs a stwcx. to the same reservation granule. >> This will succeed because the processor has the reservation >> even though thread 2 didn't do the lwarx. >> >> Note that on some processors the address given the stwcx. is >> not checked. On these processors the mere condition of having >> a reservation would cause the stwcx. to succeed, irrespective >> of whether the addresses are the same. The dummy stwcx. is >> especially important for those processors. > > Have you seen this false stwcx. actually succeed in some real > scenarios on AIM? Were there any tangible [corruption?] effects > observed without this fix? I think so, but I may be mistaken easily. I've been running with this for a while on my SMP machine and it "felt" more stable. make release for example would always end with sh(1) dumping core. I don't see that anymore. > We're seeing some hang with the dual E500 under very heavy loads, > but only with ULE (or we could only correlate this with ULE so far), > but didn't get to really close investigation of this issue yet. I'm > wondering if it's something of this sort too. It's not impossible. I can only say: try it :-) -- Marcel Moolenaar xcllnt@mac.com