From owner-freebsd-arm@FreeBSD.ORG Fri May 1 00:35:27 2015 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 79618697 for ; Fri, 1 May 2015 00:35:27 +0000 (UTC) Received: from moon.peach.ne.jp (moon.peach.ne.jp [203.141.148.98]) (using TLSv1 with cipher DHE-RSA-CAMELLIA256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 26F1F12D9 for ; Fri, 1 May 2015 00:35:26 +0000 (UTC) Received: from moon.peach.ne.jp (localhost [127.0.0.1]) by moon.peach.ne.jp (Postfix) with ESMTP id 60C5B50F24 for ; Fri, 1 May 2015 09:29:26 +0900 (JST) Received: from artemis (unknown [172.18.0.21]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by moon.peach.ne.jp (Postfix) with ESMTPSA id 4AD6E50F0B for ; Fri, 1 May 2015 09:29:26 +0900 (JST) Message-ID: <0FD2F2B4EF6E490B9DB6CEF1119ECB70@ad.peach.ne.jp> From: "Daisuke Aoyama" To: Subject: RPi2 support and some minor bugfix Date: Fri, 1 May 2015 09:29:27 +0900 MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="----=_NextPart_000_146C_01D083F1.51AB6B50" X-Priority: 3 X-MSMail-Priority: Normal Importance: Normal X-Mailer: Microsoft Windows Live Mail 14.0.8117.416 X-MimeOLE: Produced By Microsoft MimeOLE V14.0.8117.416 X-Virus-Scanned: ClamAV using ClamSMTP X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 01 May 2015 00:35:27 -0000 This is a multi-part message in MIME format. ------=_NextPart_000_146C_01D083F1.51AB6B50 Content-Type: text/plain; format=flowed; charset="iso-2022-jp"; reply-type=original Content-Transfer-Encoding: 7bit Hi, I have created RPi2 fix patch against r282205. This is a part of NAS4Free's kernel source. (not yet uploaded) Left part will be created, but you must apply the patch first. You can apply the patch to plain FreeBSD kernel source. It solves DMA problem on SDHCI. To get max frequency, you need powerd or set it manually via sysctl. Regards, -- Daisuke Aoyama ------=_NextPart_000_146C_01D083F1.51AB6B50 Content-Type: application/octet-stream; name="rpi2fix-20150501.patch" Content-Transfer-Encoding: quoted-printable Content-Disposition: attachment; filename="rpi2fix-20150501.patch" Index: sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c=0A= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=0A= --- sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c (revision 282205)=0A= +++ sys/arm/broadcom/bcm2835/bcm2835_cpufreq.c (working copy)=0A= @@ -1,5 +1,5 @@=0A= /*-=0A= - * Copyright (C) 2013-2014 Daisuke Aoyama =0A= + * Copyright (C) 2013-2015 Daisuke Aoyama =0A= * All rights reserved.=0A= *=0A= * Redistribution and use in source and binary forms, with or without=0A= @@ -62,13 +62,24 @@=0A= =0A= #define HZ2MHZ(freq) ((freq) / (1000 * 1000))=0A= #define MHZ2HZ(freq) ((freq) * (1000 * 1000))=0A= +=0A= +#ifdef SOC_BCM2836=0A= +/* RPi2 */=0A= +#define OFFSET2MVOLT(val) (((val) / 1000))=0A= +#define MVOLT2OFFSET(val) (((val) * 1000))=0A= +#define DEFAULT_ARM_FREQUENCY 600=0A= +#define DEFAULT_CORE_FREQUENCY 250=0A= +#define DEFAULT_SDRAM_FREQUENCY 400=0A= +#define DEFAULT_LOWEST_FREQ 600=0A= +#else=0A= +/* RPi */=0A= #define OFFSET2MVOLT(val) (1200 + ((val) * 25))=0A= #define MVOLT2OFFSET(val) (((val) - 1200) / 25)=0A= -=0A= #define DEFAULT_ARM_FREQUENCY 700=0A= #define DEFAULT_CORE_FREQUENCY 250=0A= #define DEFAULT_SDRAM_FREQUENCY 400=0A= #define DEFAULT_LOWEST_FREQ 300=0A= +#endif=0A= #define TRANSITION_LATENCY 1000=0A= #define MIN_OVER_VOLTAGE -16=0A= #define MAX_OVER_VOLTAGE 6=0A= @@ -1418,6 +1429,9 @@=0A= bcm2835_cpufreq_probe(device_t dev)=0A= {=0A= =0A= + if (device_get_unit(dev) !=3D 0)=0A= + return (ENXIO);=0A= +=0A= device_set_desc(dev, "CPU Frequency Control");=0A= return (0);=0A= }=0A= @@ -1440,6 +1454,9 @@=0A= struct sysctl_oid *oid;=0A= int err;=0A= =0A= + if (device_get_unit(dev) !=3D 0)=0A= + return (ENXIO);=0A= +=0A= /* set self dev */=0A= sc =3D device_get_softc(dev);=0A= sc->dev =3D dev;=0A= @@ -1740,6 +1757,23 @@=0A= if (min_freq > cpufreq_lowest_freq)=0A= min_freq =3D cpufreq_lowest_freq;=0A= =0A= +#ifdef SOC_BCM2836=0A= + /* XXX RPi2 have only 900/600MHz */=0A= + idx =3D 0;=0A= + volts =3D sc->min_voltage_core;=0A= + sets[idx].freq =3D freq;=0A= + sets[idx].volts =3D volts;=0A= + sets[idx].lat =3D TRANSITION_LATENCY;=0A= + sets[idx].dev =3D dev;=0A= + idx++;=0A= + if (freq !=3D min_freq) {=0A= + sets[idx].freq =3D min_freq;=0A= + sets[idx].volts =3D volts;=0A= + sets[idx].lat =3D TRANSITION_LATENCY;=0A= + sets[idx].dev =3D dev;=0A= + idx++;=0A= + }=0A= +#else=0A= /* from freq to min_freq */=0A= for (idx =3D 0; idx < *count && freq >=3D min_freq; idx++) {=0A= if (freq > sc->arm_min_freq)=0A= @@ -1752,7 +1786,8 @@=0A= sets[idx].dev =3D dev;=0A= freq -=3D MHZSTEP;=0A= }=0A= - *count =3D ++idx;=0A= +#endif=0A= + *count =3D idx;=0A= =0A= return (0);=0A= }=0A= Index: sys/arm/broadcom/bcm2835/bcm2835_sdhci.c=0A= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=0A= --- sys/arm/broadcom/bcm2835/bcm2835_sdhci.c (revision 282205)=0A= +++ sys/arm/broadcom/bcm2835/bcm2835_sdhci.c (working copy)=0A= @@ -68,15 +68,8 @@=0A= #define dprintf(fmt, args...)=0A= #endif=0A= =0A= -/* DMA doesn't yet work with the bcm3826 */=0A= -#ifdef SOC_BCM2836=0A= -#define PIO_MODE 1=0A= -#else=0A= -#define PIO_MODE 0=0A= -#endif=0A= -=0A= static int bcm2835_sdhci_hs =3D 1;=0A= -static int bcm2835_sdhci_pio_mode =3D PIO_MODE;=0A= +static int bcm2835_sdhci_pio_mode =3D 0;=0A= =0A= TUNABLE_INT("hw.bcm2835.sdhci.hs", &bcm2835_sdhci_hs);=0A= TUNABLE_INT("hw.bcm2835.sdhci.pio_mode", &bcm2835_sdhci_pio_mode);=0A= Index: sys/arm/broadcom/bcm2835/bcm2835_vcbus.h=0A= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=0A= --- sys/arm/broadcom/bcm2835/bcm2835_vcbus.h (revision 282205)=0A= +++ sys/arm/broadcom/bcm2835/bcm2835_vcbus.h (working copy)=0A= @@ -37,7 +37,11 @@=0A= #define BCM2835_VCBUS_IO_BASE 0x7E000000=0A= #define BCM2835_VCBUS_SDRAM_UNCACHED 0xC0000000=0A= =0A= +#ifdef SOC_BCM2836=0A= +#define BCM2835_ARM_IO_BASE 0x3F000000=0A= +#else=0A= #define BCM2835_ARM_IO_BASE 0x20000000=0A= +#endif=0A= #define BCM2835_ARM_IO_SIZE 0x02000000=0A= =0A= /*=0A= ------=_NextPart_000_146C_01D083F1.51AB6B50--