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From: John-Mark Gurney <jmg@FreeBSD.org>
To: Perforce Change Reviews <perforce@freebsd.org>
Subject: PERFORCE change 71398 for review
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http://perforce.freebsd.org/chv.cgi?CH=71398

Change 71398 by jmg@jmg_carbon on 2005/02/20 20:22:26

	fix a very stupid braino, EP93XX_UART_F_TXFF != 1!!  luckily, w/o
	cache the board runs so slowly, that this is never an issue, but if
	you enable either the I or D cache, since the TXFF is never full,
	it just drops chars..

Affected files ...

.. //depot/projects/arm/src/sys/dev/uart/uart_dev_epuart.c#2 edit

Differences ...

==== //depot/projects/arm/src/sys/dev/uart/uart_dev_epuart.c#2 (text+ko) ====

@@ -246,8 +246,8 @@
 #if 0
 	/* Set RTS & DTR. */
 	uart_setreg(bas, EP93XX_UART_MdmCtrl, 0);
+	uart_barrier(bas);
 #endif
-	uart_barrier(bas);
 }
 
 static void
@@ -268,7 +268,7 @@
 	delay = epuart_delay(bas);
 
 	limit = 20;
-	while ((uart_getreg(bas, EP93XX_UART_Flag) & EP93XX_UART_F_TXFF) == 1 &&
+	while ((uart_getreg(bas, EP93XX_UART_Flag) & EP93XX_UART_F_TXFF) &&
 	    --limit)
 		DELAY(delay);
 	uart_setreg(bas, EP93XX_UART_Data, c);