Date: Fri, 31 May 1996 15:23:56 +0800 From: Peter Wemm <peter@spinner.dialix.com> To: Poul-Henning Kamp <phk@critter.tfs.com> Cc: erich@uruk.org, freebsd-smp@freebsd.org Subject: Re: How do you get the SMP code Message-ID: <199605310723.PAA00896@spinner.DIALix.COM> In-Reply-To: Your message of "Thu, 30 May 1996 20:28:41 GMT." <777.833488121@critter.tfs.com>
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>> It is particular to each processor. On the Pentium and Pentium Pro, >> accesses are part of the external bus and L2 DCU path respectively. >> I.e. I think it is slower than the L1. >but faster than doing too much aritmetic on the apic_id. My point being >that any attempt to find the per-cpu data starts out with trying to read >the APIC_ID, so we might as well cache a pointer in the APIC and read >that instead... According to the "Intel secrets" pages, there are a few "undocumented" 32 bit and 64 bit registers that we might be able to use if we really wanted to live on the edge. (http://www.x86.org ??) But that way lies madness.. :-) I wish there were a few scratch registers in the APIC.. Or for that matter, I wish the read/write APIC_ID register was 32 bits wide (for a pointer), not just 4 or however many there are... Cheers, -Peter
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