From owner-svn-src-all@freebsd.org Sat May 12 13:14:02 2018 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id AD49FFDB0BE; Sat, 12 May 2018 13:14:02 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 54078848F2; Sat, 12 May 2018 13:14:02 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 359B21ED43; Sat, 12 May 2018 13:14:02 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w4CDE21Y060390; Sat, 12 May 2018 13:14:02 GMT (envelope-from manu@FreeBSD.org) Received: (from manu@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w4CDE2ex060389; Sat, 12 May 2018 13:14:02 GMT (envelope-from manu@FreeBSD.org) Message-Id: <201805121314.w4CDE2ex060389@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: manu set sender to manu@FreeBSD.org using -f From: Emmanuel Vadot Date: Sat, 12 May 2018 13:14:02 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r333556 - head/sys/arm/allwinner X-SVN-Group: head X-SVN-Commit-Author: manu X-SVN-Commit-Paths: head/sys/arm/allwinner X-SVN-Commit-Revision: 333556 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 12 May 2018 13:14:02 -0000 Author: manu Date: Sat May 12 13:14:01 2018 New Revision: 333556 URL: https://svnweb.freebsd.org/changeset/base/333556 Log: aw_mmc: Rework regulator handling Don't enable regulator on attach but dealt with them on power_up/power_off Only set the voltage for the signaling regulator since I don't have boards that can change the supply voltage. Enable 1.8v signaling voltage. Modified: head/sys/arm/allwinner/aw_mmc.c Modified: head/sys/arm/allwinner/aw_mmc.c ============================================================================== --- head/sys/arm/allwinner/aw_mmc.c Sat May 12 13:13:34 2018 (r333555) +++ head/sys/arm/allwinner/aw_mmc.c Sat May 12 13:14:01 2018 (r333556) @@ -115,6 +115,7 @@ struct aw_mmc_softc { uint32_t aw_intr_wait; void * aw_intrhand; int32_t aw_vdd; + int32_t aw_vccq; regulator_t aw_reg_vmmc; regulator_t aw_reg_vqmmc; unsigned int aw_clock; @@ -265,13 +266,11 @@ aw_mmc_attach(device_t dev) &sc->aw_reg_vmmc) == 0) { if (bootverbose) device_printf(dev, "vmmc-supply regulator found\n"); - regulator_enable(sc->aw_reg_vmmc); } if (regulator_get_by_ofw_property(dev, 0, "vqmmc-supply", &sc->aw_reg_vqmmc) == 0 && bootverbose) { if (bootverbose) device_printf(dev, "vqmmc-supply regulator found\n"); - regulator_enable(sc->aw_reg_vqmmc); } sc->aw_host.f_min = 400000; @@ -281,7 +280,7 @@ aw_mmc_attach(device_t dev) MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_DDR50 | MMC_CAP_MMC_DDR52; - sc->aw_host.caps |= MMC_CAP_SIGNALING_330 /* | MMC_CAP_SIGNALING_180 */; + sc->aw_host.caps |= MMC_CAP_SIGNALING_330 | MMC_CAP_SIGNALING_180; if (bus_width >= 4) sc->aw_host.caps |= MMC_CAP_4_BIT_DATA; @@ -800,6 +799,9 @@ aw_mmc_read_ivar(device_t bus, device_t child, int whi case MMCBR_IVAR_VDD: *(int *)result = sc->aw_host.ios.vdd; break; + case MMCBR_IVAR_VCCQ: + *(int *)result = sc->aw_host.ios.vccq; + break; case MMCBR_IVAR_CAPS: *(int *)result = sc->aw_host.caps; break; @@ -848,6 +850,9 @@ aw_mmc_write_ivar(device_t bus, device_t child, int wh case MMCBR_IVAR_VDD: sc->aw_host.ios.vdd = value; break; + case MMCBR_IVAR_VCCQ: + sc->aw_host.ios.vccq = value; + break; case MMCBR_IVAR_TIMING: sc->aw_host.ios.timing = value; break; @@ -906,36 +911,30 @@ aw_mmc_update_clock(struct aw_mmc_softc *sc, uint32_t } static void -aw_mmc_set_power(struct aw_mmc_softc *sc, int32_t vdd) +aw_mmc_set_vccq(struct aw_mmc_softc *sc, int32_t vccq) { - int min_uvolt, max_uvolt; + int uvolt; - sc->aw_vdd = vdd; - if (sc->aw_reg_vqmmc == NULL) return; - switch (1 << vdd) { - case MMC_OCR_LOW_VOLTAGE: - min_uvolt = max_uvolt = 1800000; + switch (vccq) { + case vccq_180: + uvolt = 1800000; break; - case MMC_OCR_320_330: - min_uvolt = 3200000; - max_uvolt = 3300000; + case vccq_330: + uvolt = 3300000; break; - case MMC_OCR_330_340: - min_uvolt = 3300000; - max_uvolt = 3400000; - break; + default: + return; } - if (sc->aw_reg_vqmmc) - if (regulator_set_voltage(sc->aw_reg_vqmmc, - min_uvolt, max_uvolt) != 0) - device_printf(sc->aw_dev, - "Cannot set vqmmc to %d<->%d\n", - min_uvolt, - max_uvolt); + if (regulator_set_voltage(sc->aw_reg_vqmmc, + uvolt, uvolt) != 0) + device_printf(sc->aw_dev, + "Cannot set vqmmc to %d<->%d\n", + uvolt, + uvolt); } static int @@ -970,14 +969,30 @@ aw_mmc_update_ios(device_t bus, device_t child) case power_off: if (bootverbose) device_printf(sc->aw_dev, "Powering down sd/mmc\n"); + + if (sc->aw_reg_vmmc) + regulator_disable(sc->aw_reg_vmmc); + if (sc->aw_reg_vqmmc) + regulator_disable(sc->aw_reg_vqmmc); + aw_mmc_reset(sc); break; case power_up: if (bootverbose) device_printf(sc->aw_dev, "Powering up sd/mmc\n"); + + if (sc->aw_reg_vmmc) + regulator_enable(sc->aw_reg_vmmc); + if (sc->aw_reg_vqmmc) + regulator_enable(sc->aw_reg_vqmmc); aw_mmc_init(sc); break; }; + + if (ios->vccq != sc->aw_vccq) { + aw_mmc_set_vccq(sc, ios->vccq); + sc->aw_vccq = ios->vccq; + } /* Enable ddr mode if needed */ reg = AW_MMC_READ_4(sc, AW_MMC_GCTL);