Date: Sun, 17 Jan 2016 15:21:23 +0000 (UTC) From: Ruslan Bukin <br@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r294227 - in head/lib: libc libc/gen libc/riscv libc/riscv/gen libc/riscv/sys libc/xdr libstand Message-ID: <201601171521.u0HFLNvD063018@repo.freebsd.org>
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Author: br Date: Sun Jan 17 15:21:23 2016 New Revision: 294227 URL: https://svnweb.freebsd.org/changeset/base/294227 Log: Bring in initial libc and libstand support for RISC-V. Reviewed by: andrew, emaste, kib Sponsored by: DARPA, AFRL Sponsored by: HEIF5 Differential Revision: https://reviews.freebsd.org/D4943 Added: head/lib/libc/riscv/SYS.h (contents, props changed) head/lib/libc/riscv/Symbol.map (contents, props changed) head/lib/libc/riscv/_fpmath.h (contents, props changed) head/lib/libc/riscv/arith.h (contents, props changed) head/lib/libc/riscv/gd_qnan.h (contents, props changed) head/lib/libc/riscv/gen/ head/lib/libc/riscv/gen/Makefile.inc (contents, props changed) head/lib/libc/riscv/gen/_ctx_start.S (contents, props changed) head/lib/libc/riscv/gen/_set_tp.c (contents, props changed) head/lib/libc/riscv/gen/_setjmp.S (contents, props changed) head/lib/libc/riscv/gen/fabs.S (contents, props changed) head/lib/libc/riscv/gen/flt_rounds.c (contents, props changed) head/lib/libc/riscv/gen/infinity.c (contents, props changed) head/lib/libc/riscv/gen/makecontext.c (contents, props changed) head/lib/libc/riscv/gen/setjmp.S (contents, props changed) head/lib/libc/riscv/gen/sigsetjmp.S (contents, props changed) head/lib/libc/riscv/sys/ head/lib/libc/riscv/sys/Makefile.inc (contents, props changed) head/lib/libc/riscv/sys/brk.S (contents, props changed) head/lib/libc/riscv/sys/cerror.S (contents, props changed) head/lib/libc/riscv/sys/pipe.S (contents, props changed) head/lib/libc/riscv/sys/sbrk.S (contents, props changed) head/lib/libc/riscv/sys/shmat.S (contents, props changed) head/lib/libc/riscv/sys/sigreturn.S (contents, props changed) head/lib/libc/riscv/sys/syscall.S (contents, props changed) head/lib/libc/riscv/sys/vfork.S (contents, props changed) Modified: head/lib/libc/Makefile head/lib/libc/gen/tls.c head/lib/libc/riscv/Makefile.inc head/lib/libc/xdr/xdr_float.c head/lib/libstand/Makefile Modified: head/lib/libc/Makefile ============================================================================== --- head/lib/libc/Makefile Sun Jan 17 14:35:37 2016 (r294226) +++ head/lib/libc/Makefile Sun Jan 17 15:21:23 2016 (r294227) @@ -83,6 +83,7 @@ NOASM= .if ${LIBC_ARCH} != "aarch64" && \ ${LIBC_ARCH} != "amd64" && \ ${LIBC_ARCH} != "powerpc64" && \ + ${LIBC_ARCH} != "riscv" && \ ${LIBC_ARCH} != "sparc64" && \ ${MACHINE_ARCH:Mmipsn32*} == "" && \ ${MACHINE_ARCH:Mmips64*} == "" @@ -101,7 +102,7 @@ NOASM= .include "${LIBC_SRCTOP}/uuid/Makefile.inc" .include "${LIBC_SRCTOP}/xdr/Makefile.inc" .if (${LIBC_ARCH} == "arm" && ${MACHINE_ARCH} != "armv6hf") ||\ - ${LIBC_ARCH} == "mips" + ${LIBC_ARCH} == "mips" && ${LIBC_ARCH} == "riscv" .include "${LIBC_SRCTOP}/softfloat/Makefile.inc" .endif .if ${MK_NIS} != "no" Modified: head/lib/libc/gen/tls.c ============================================================================== --- head/lib/libc/gen/tls.c Sun Jan 17 14:35:37 2016 (r294226) +++ head/lib/libc/gen/tls.c Sun Jan 17 15:21:23 2016 (r294227) @@ -64,15 +64,16 @@ void __libc_free_tls(void *tls, size_t t #if defined(__amd64__) #define TLS_TCB_ALIGN 16 -#elif defined(__powerpc__) || defined(__i386__) || defined(__arm__) || \ - defined(__sparc64__) || defined(__mips__) || defined(__aarch64__) +#elif defined(__aarch64__) || defined(__arm__) || defined(__i386__) || \ + defined(__mips__) || defined(__powerpc__) || defined(__riscv__) || \ + defined(__sparc64__) #define TLS_TCB_ALIGN sizeof(void *) #else #error TLS_TCB_ALIGN undefined for target architecture #endif -#if defined(__arm__) || defined(__mips__) || defined(__powerpc__) || \ - defined(__aarch64__) +#if defined(__aarch64__) || defined(__arm__) || defined(__mips__) || \ + defined(__powerpc__) || defined(__riscv__) #define TLS_VARIANT_I #endif #if defined(__i386__) || defined(__amd64__) || defined(__sparc64__) Modified: head/lib/libc/riscv/Makefile.inc ============================================================================== --- head/lib/libc/riscv/Makefile.inc Sun Jan 17 14:35:37 2016 (r294226) +++ head/lib/libc/riscv/Makefile.inc Sun Jan 17 15:21:23 2016 (r294227) @@ -1 +1,9 @@ # $FreeBSD$ +# +# Machine dependent definitions for the RISC-V architecture. +# + +# Long double is quad precision +GDTOASRCS+=strtorQ.c +MDSRCS+=machdep_ldisQ.c +SYM_MAPS+=${LIBC_SRCTOP}/riscv/Symbol.map Added: head/lib/libc/riscv/SYS.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/lib/libc/riscv/SYS.h Sun Jan 17 15:21:23 2016 (r294227) @@ -0,0 +1,68 @@ +/*- + * Copyright (c) 2014 Andrew Turner + * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#include <sys/syscall.h> +#include <machine/asm.h> + +#define _SYSCALL(name) \ + li t0, SYS_ ## name; \ + ecall + +#define SYSCALL(name) \ +ENTRY(__sys_##name); \ + WEAK_REFERENCE(__sys_##name, name); \ + WEAK_REFERENCE(__sys_##name, _##name); \ + _SYSCALL(name); \ + ret; \ +END(__sys_##name) + +#define PSEUDO(name) \ +ENTRY(__sys_##name); \ + WEAK_REFERENCE(__sys_##name, _##name); \ + _SYSCALL(name); \ + bnez t0, cerror; \ + ret; \ +END(__sys_##name) + +#define RSYSCALL(name) \ +ENTRY(__sys_##name); \ + WEAK_REFERENCE(__sys_##name, name); \ + WEAK_REFERENCE(__sys_##name, _##name); \ + _SYSCALL(name); \ + bnez t0, cerror; \ + ret; \ +END(__sys_##name) Added: head/lib/libc/riscv/Symbol.map ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/lib/libc/riscv/Symbol.map Sun Jan 17 15:21:23 2016 (r294227) @@ -0,0 +1,42 @@ +/* + * $FreeBSD$ + */ + +/* + * This only needs to contain symbols that are not listed in + * symbol maps from other parts of libc (i.e., not found in + * stdlib/Symbol.map, string/Symbol.map, sys/Symbol.map, ...). + */ +FBSD_1.0 { + /* PSEUDO syscalls */ + _exit; + + _setjmp; + _longjmp; + fabs; + __flt_rounds; + fpgetmask; + fpsetmask; + __infinity; + __nan; + setjmp; + longjmp; + sigsetjmp; + siglongjmp; + htonl; + htons; + ntohl; + ntohs; + vfork; + brk; + sbrk; + makecontext; +}; + +FBSDprivate_1.0 { + _set_tp; + _end; + curbrk; + minbrk; + __makecontext; +}; Added: head/lib/libc/riscv/_fpmath.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/lib/libc/riscv/_fpmath.h Sun Jan 17 15:21:23 2016 (r294227) @@ -0,0 +1,71 @@ +/*- + * Copyright (c) 2002, 2003 David Schultz <das@FreeBSD.ORG> + * Copyright (c) 2014 The FreeBSD Foundation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +union IEEEl2bits { + long double e; + struct { + unsigned long manl :64; + unsigned long manh :48; + unsigned int exp :15; + unsigned int sign :1; + } bits; + struct { + unsigned long manl :64; + unsigned long manh :48; + unsigned int expsign :16; + } xbits; +}; + +#define LDBL_NBIT 0 +#define LDBL_IMPLICIT_NBIT +#define mask_nbit_l(u) ((void)0) + +#define LDBL_MANH_SIZE 20 +#define LDBL_MANL_SIZE 32 + +#define LDBL_TO_ARRAY32(u, a) do { \ + (a)[0] = (uint32_t)(u).bits.manl; \ + (a)[1] = (uint32_t)(u).bits.manh; \ +} while(0) + +/* + * TODO: Due to compiler problem we are temporary using + * LDBL_PREC == 53. Use code below for LDBL_PREC == 113 + */ +#if 0 +#define LDBL_MANH_SIZE 48 +#define LDBL_MANL_SIZE 64 + +#define LDBL_TO_ARRAY32(u, a) do { \ + (a)[0] = (uint32_t)(u).bits.manl; \ + (a)[1] = (uint32_t)((u).bits.manl >> 32); \ + (a)[2] = (uint32_t)(u).bits.manh; \ + (a)[3] = (uint32_t)((u).bits.manh >> 32); \ +} while(0) +#endif Added: head/lib/libc/riscv/arith.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/lib/libc/riscv/arith.h Sun Jan 17 15:21:23 2016 (r294227) @@ -0,0 +1,19 @@ +/* + * MD header for contrib/gdtoa + * + * $FreeBSD$ + */ + +/* + * NOTE: The definitions in this file must be correct or strtod(3) and + * floating point formats in printf(3) will break! The file can be + * generated by running contrib/gdtoa/arithchk.c on the target + * architecture. See contrib/gdtoa/gdtoaimp.h for details. + */ + +#define IEEE_8087 +#define Arith_Kind_ASL 1 +#define Long int +#define Intcast (int)(long) +#define Double_Align +#define X64_bit_pointers Added: head/lib/libc/riscv/gd_qnan.h ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/lib/libc/riscv/gd_qnan.h Sun Jan 17 15:21:23 2016 (r294227) @@ -0,0 +1,21 @@ +/* + * MD header for contrib/gdtoa + * + * This file can be generated by compiling and running contrib/gdtoa/qnan.c + * on the target architecture after arith.h has been generated. + * + * $FreeBSD$ + */ + +#define f_QNAN 0x7fc00000 +#define d_QNAN0 0x0 +#define d_QNAN1 0x7ff80000 +#define ld_QNAN0 0x0 +#define ld_QNAN1 0x7ff80000 +#define ld_QNAN2 0x0 +#define ld_QNAN3 0x0 +#define ldus_QNAN0 0x0 +#define ldus_QNAN1 0x0 +#define ldus_QNAN2 0x0 +#define ldus_QNAN3 0x7ff8 +#define ldus_QNAN4 0x0 Added: head/lib/libc/riscv/gen/Makefile.inc ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/lib/libc/riscv/gen/Makefile.inc Sun Jan 17 15:21:23 2016 (r294227) @@ -0,0 +1,13 @@ +# $FreeBSD$ + +SRCS+= _ctx_start.S \ + fabs.S \ + flt_rounds.c \ + infinity.c \ + ldexp.c \ + makecontext.c \ + _setjmp.S \ + _set_tp.c \ + setjmp.S \ + sigsetjmp.S \ + trivial-getcontextx.c Added: head/lib/libc/riscv/gen/_ctx_start.S ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/lib/libc/riscv/gen/_ctx_start.S Sun Jan 17 15:21:23 2016 (r294227) @@ -0,0 +1,43 @@ +/*- + * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +ENTRY(_ctx_start) + jalr s0 /* Call func from makecontext */ + mv a0, s1 /* Load ucp saved in makecontext */ + call _C_LABEL(ctx_done) + call _C_LABEL(abort) +END(_ctx_start) Added: head/lib/libc/riscv/gen/_set_tp.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/lib/libc/riscv/gen/_set_tp.c Sun Jan 17 15:21:23 2016 (r294227) @@ -0,0 +1,50 @@ +/*- + * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <string.h> +#include <sys/types.h> + +#include <machine/sysarch.h> + +#include <stdlib.h> + +void +_set_tp(void *tp) +{ + + __asm __volatile("mv tp, %0" :: "r"((char*)tp + 0x10)); +} Added: head/lib/libc/riscv/gen/_setjmp.S ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/lib/libc/riscv/gen/_setjmp.S Sun Jan 17 15:21:23 2016 (r294227) @@ -0,0 +1,151 @@ +/*- + * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +#include <machine/setjmp.h> + +ENTRY(_setjmp) + /* Store the magic value and stack pointer */ + la t0, .Lmagic + ld t0, 0(t0) + sd t0, (0 * 8)(a0) + sd sp, (1 * 8)(a0) + addi a0, a0, (2 * 8) + + /* Store the general purpose registers and ra */ + sd s0, (0 * 8)(a0) + sd s1, (1 * 8)(a0) + sd s2, (2 * 8)(a0) + sd s3, (3 * 8)(a0) + sd s4, (4 * 8)(a0) + sd s5, (5 * 8)(a0) + sd s6, (6 * 8)(a0) + sd s7, (7 * 8)(a0) + sd s8, (8 * 8)(a0) + sd s9, (9 * 8)(a0) + sd s10, (10 * 8)(a0) + sd s11, (11 * 8)(a0) + sd ra, (12 * 8)(a0) + addi a0, a0, (13 * 8) + +#ifndef _STANDALONE +#if 0 + /* RISCVTODO */ + /* Store the vfp registers */ + fsq fs0, (0 * 16)(a0) + fsq fs1, (1 * 16)(a0) + fsq fs2, (2 * 16)(a0) + fsq fs3, (3 * 16)(a0) + fsq fs4, (4 * 16)(a0) + fsq fs5, (5 * 16)(a0) + fsq fs6, (6 * 16)(a0) + fsq fs7, (7 * 16)(a0) + fsq fs8, (8 * 16)(a0) + fsq fs9, (9 * 16)(a0) + fsq fs10, (10 * 16)(a0) + fsq fs11, (11 * 16)(a0) + addi a0, a0, (12 * 16) +#endif +#endif + + /* Return value */ + li a0, 0 + ret + .align 3 +.Lmagic: + .quad _JB_MAGIC__SETJMP +END(_setjmp) + +ENTRY(_longjmp) + /* Check the magic value */ + ld t0, 0(a0) + la t1, .Lmagic + ld t1, 0(t1) + bne t0, t1, botch + + /* Restore the stack pointer */ + ld t0, 8(a0) + mv sp, t0 + addi a0, a0, (2 * 8) + + /* Restore the general purpose registers and ra */ + ld s0, (0 * 8)(a0) + ld s1, (1 * 8)(a0) + ld s2, (2 * 8)(a0) + ld s3, (3 * 8)(a0) + ld s4, (4 * 8)(a0) + ld s5, (5 * 8)(a0) + ld s6, (6 * 8)(a0) + ld s7, (7 * 8)(a0) + ld s8, (8 * 8)(a0) + ld s9, (9 * 8)(a0) + ld s10, (10 * 8)(a0) + ld s11, (11 * 8)(a0) + ld ra, (12 * 8)(a0) + addi a0, a0, (13 * 8) + +#ifndef _STANDALONE +#if 0 + /* RISCVTODO */ + /* Restore the vfp registers */ + flq fs0, (0 * 16)(a0) + flq fs1, (1 * 16)(a0) + flq fs2, (2 * 16)(a0) + flq fs3, (3 * 16)(a0) + flq fs4, (4 * 16)(a0) + flq fs5, (5 * 16)(a0) + flq fs6, (6 * 16)(a0) + flq fs7, (7 * 16)(a0) + flq fs8, (8 * 16)(a0) + flq fs9, (9 * 16)(a0) + flq fs10, (10 * 16)(a0) + flq fs11, (11 * 16)(a0) + addi a0, a0, (12 * 16) +#endif +#endif + + /* Load the return value */ + mv a0, a1 + ret + +botch: +#ifdef _STANDALONE + j botch +#else + call _C_LABEL(longjmperror) + call _C_LABEL(abort) +#endif +END(_longjmp) Added: head/lib/libc/riscv/gen/fabs.S ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/lib/libc/riscv/gen/fabs.S Sun Jan 17 15:21:23 2016 (r294227) @@ -0,0 +1,41 @@ +/*- + * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +ENTRY(fabs) + fabs.d fa0, fa0 + ret +END(fabs) Added: head/lib/libc/riscv/gen/flt_rounds.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/lib/libc/riscv/gen/flt_rounds.c Sun Jan 17 15:21:23 2016 (r294227) @@ -0,0 +1,71 @@ +/*- + * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/types.h> + +#include <fenv.h> +#include <float.h> + +int +__flt_rounds(void) +{ +#if 0 + uint64_t fcsr; +#endif + int mode; + +#if 0 + __asm __volatile("csrr %0, fcsr" : "=r" (fcsr)); + mode = (fcsr & _ROUND_MASK); +#endif + + /* RISCVTODO */ + mode = FE_TOWARDZERO; /* softfloat rounding mode */ + + switch (mode) { + case FE_TOWARDZERO: + return (0); + case FE_TONEAREST: + return (1); + case FE_UPWARD: + return (2); + case FE_DOWNWARD: + return (3); + } + + return (-1); +} Added: head/lib/libc/riscv/gen/infinity.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/lib/libc/riscv/gen/infinity.c Sun Jan 17 15:21:23 2016 (r294227) @@ -0,0 +1,14 @@ +/* + * infinity.c + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <math.h> + +/* bytes for +Infinity on riscv */ +const union __infinity_un __infinity = { { 0, 0, 0, 0, 0, 0, 0xf0, 0x7f } }; + +/* bytes for NaN */ +const union __nan_un __nan = { { 0, 0, 0xc0, 0xff } }; Added: head/lib/libc/riscv/gen/makecontext.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/lib/libc/riscv/gen/makecontext.c Sun Jan 17 15:21:23 2016 (r294227) @@ -0,0 +1,91 @@ +/*- + * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> + +#include <machine/riscvreg.h> + +#include <inttypes.h> +#include <stdarg.h> +#include <stdlib.h> +#include <ucontext.h> + +void _ctx_start(void); + +void +ctx_done(ucontext_t *ucp) +{ + + if (ucp->uc_link == NULL) { + exit(0); + } else { + setcontext((const ucontext_t *)ucp->uc_link); + abort(); + } +} + +__weak_reference(__makecontext, makecontext); + +void +__makecontext(ucontext_t *ucp, void (*func)(void), int argc, ...) +{ + struct gpregs *gp; + va_list ap; + int i; + + /* A valid context is required. */ + if (ucp == NULL) + return; + + if ((argc < 0) || (argc > 8)) + return; + + gp = &ucp->uc_mcontext.mc_gpregs; + + va_start(ap, argc); + /* Pass up to eight arguments in a0-7. */ + for (i = 0; i < argc && i < 8; i++) + gp->gp_a[i] = va_arg(ap, uint64_t); + va_end(ap); + + /* Set the stack */ + gp->gp_sp = STACKALIGN(ucp->uc_stack.ss_sp + ucp->uc_stack.ss_size); + /* Arrange for return via the trampoline code. */ + gp->gp_sepc = (__register_t)_ctx_start; + gp->gp_s[0] = (__register_t)func; + gp->gp_s[1] = (__register_t)ucp; +} Added: head/lib/libc/riscv/gen/setjmp.S ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/lib/libc/riscv/gen/setjmp.S Sun Jan 17 15:21:23 2016 (r294227) @@ -0,0 +1,173 @@ +/*- + * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <machine/asm.h> +__FBSDID("$FreeBSD$"); + +#include <machine/setjmp.h> + +ENTRY(setjmp) + addi sp, sp, -(2 * 8) + sd a0, 0(sp) + sd ra, 8(sp) + + /* Store the signal mask */ + addi a2, a0, (_JB_SIGMASK * 8) /* oset */ + li a1, 0 /* set */ + li a0, 1 /* SIG_BLOCK */ + jal sigprocmask + + ld a0, 0(sp) + ld ra, 8(sp) + addi sp, sp, (2 * 8) + + /* Store the magic value and stack pointer */ + la t0, .Lmagic + ld t0, 0(t0) + sd t0, (0 * 8)(a0) + sd sp, (1 * 8)(a0) + addi a0, a0, (2 * 8) + + /* Store the general purpose registers and ra */ + sd s0, (0 * 8)(a0) + sd s1, (1 * 8)(a0) + sd s2, (2 * 8)(a0) + sd s3, (3 * 8)(a0) + sd s4, (4 * 8)(a0) + sd s5, (5 * 8)(a0) + sd s6, (6 * 8)(a0) + sd s7, (7 * 8)(a0) + sd s8, (8 * 8)(a0) + sd s9, (9 * 8)(a0) + sd s10, (10 * 8)(a0) + sd s11, (11 * 8)(a0) + sd ra, (12 * 8)(a0) + addi a0, a0, (13 * 8) + +#if 0 + /* RISCVTODO */ + /* Store the vfp registers */ + fsq fs0, (0 * 16)(a0) + fsq fs1, (1 * 16)(a0) + fsq fs2, (2 * 16)(a0) + fsq fs3, (3 * 16)(a0) + fsq fs4, (4 * 16)(a0) + fsq fs5, (5 * 16)(a0) + fsq fs6, (6 * 16)(a0) + fsq fs7, (7 * 16)(a0) + fsq fs8, (8 * 16)(a0) + fsq fs9, (9 * 16)(a0) + fsq fs10, (10 * 16)(a0) + fsq fs11, (11 * 16)(a0) + addi a0, a0, (12 * 16) +#endif + + /* Return value */ + li a0, 0 + ret + .align 3 +.Lmagic: + .quad _JB_MAGIC_SETJMP +END(setjmp) + +ENTRY(longjmp) + addi sp, sp, -(4 * 8) + sd a0, (0 * 8)(sp) + sd ra, (1 * 8)(sp) + sd a1, (2 * 8)(sp) + + /* Restore the signal mask */ + li a2, 0 /* oset */ + addi a1, a0, (_JB_SIGMASK * 8) /* set */ + li a0, 3 /* SIG_BLOCK */ + jal sigprocmask + + ld a1, (2 * 8)(sp) + ld ra, (1 * 8)(sp) + ld a0, (0 * 8)(sp) + addi sp, sp, (4 * 8) + + /* Check the magic value */ + ld t0, 0(a0) + la t1, .Lmagic + ld t1, 0(t1) + bne t0, t1, botch + + /* Restore the stack pointer */ + ld t0, 8(a0) + mv sp, t0 + addi a0, a0, (2 * 8) + + /* Restore the general purpose registers and ra */ + ld s0, (0 * 8)(a0) + ld s1, (1 * 8)(a0) + ld s2, (2 * 8)(a0) + ld s3, (3 * 8)(a0) + ld s4, (4 * 8)(a0) + ld s5, (5 * 8)(a0) + ld s6, (6 * 8)(a0) + ld s7, (7 * 8)(a0) + ld s8, (8 * 8)(a0) + ld s9, (9 * 8)(a0) + ld s10, (10 * 8)(a0) + ld s11, (11 * 8)(a0) + ld ra, (12 * 8)(a0) + addi a0, a0, (13 * 8) + +#if 0 + /* RISCVTODO */ + /* Restore the vfp registers */ + flq fs0, (0 * 16)(a0) + flq fs1, (1 * 16)(a0) + flq fs2, (2 * 16)(a0) + flq fs3, (3 * 16)(a0) + flq fs4, (4 * 16)(a0) + flq fs5, (5 * 16)(a0) + flq fs6, (6 * 16)(a0) + flq fs7, (7 * 16)(a0) + flq fs8, (8 * 16)(a0) + flq fs9, (9 * 16)(a0) + flq fs10, (10 * 16)(a0) + flq fs11, (11 * 16)(a0) + addi a0, a0, (12 * 16) +#endif + + /* Load the return value */ + mv a0, a1 + ret + +botch: + call _C_LABEL(longjmperror) + call _C_LABEL(abort) +END(longjmp) Added: head/lib/libc/riscv/gen/sigsetjmp.S ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/lib/libc/riscv/gen/sigsetjmp.S Sun Jan 17 15:21:23 2016 (r294227) @@ -0,0 +1,57 @@ +/*- + * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Portions of this software were developed by SRI International and the + * University of Cambridge Computer Laboratory under DARPA/AFRL contract + * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Portions of this software were developed by the University of Cambridge + * Computer Laboratory as part of the CTSRD Project, with support from the + * UK Higher Education Innovation Fund (HEIF). + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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