From owner-freebsd-arm@FreeBSD.ORG Fri Feb 15 11:20:43 2013 Return-Path: Delivered-To: freebsd-arm@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 32FB3967 for ; Fri, 15 Feb 2013 11:20:43 +0000 (UTC) (envelope-from iain@g7iii.net) Received: from hal.g7iii.net (unknown [IPv6:2600:3c02::f03c:91ff:feae:1cbe]) by mx1.freebsd.org (Postfix) with ESMTP id 12F76228 for ; Fri, 15 Feb 2013 11:20:42 +0000 (UTC) Received: from [192.168.39.76] (157.17.187.81.in-addr.arpa [81.187.17.157]) by hal.g7iii.net (Postfix) with ESMTP id 9BEC1208F5 for ; Fri, 15 Feb 2013 11:20:41 +0000 (UTC) Message-ID: <511E1A08.4020105@g7iii.net> Date: Fri, 15 Feb 2013 11:20:40 +0000 From: Iain Young User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:17.0) Gecko/20130106 Thunderbird/17.0.2 MIME-Version: 1.0 To: freebsd-arm@FreeBSD.org Subject: Beaglebone Serial Ports Progress Content-Type: multipart/mixed; boundary="------------020507070308010604080403" X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 15 Feb 2013 11:20:43 -0000 This is a multi-part message in MIME format. --------------020507070308010604080403 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Hi Folks, After waiting for deliveries, and a few false starts, I have made -some- progress on adding support for the Beaglebone's serial ports (UARTS1-5) to FreeBSD First thing I did was add the pinmux stuff, having worked out exactly what I needed to add to the DTS, and recompile. This seems to have worked out well, and on a reboot I see: setting internal 28 for uart1_rxd setting internal 0 for uart1_txd This is good. kernel comes up,curiously though, I don't see lines output for the RTS and CTS lines (which I do set to the correct mode, yet I do for UART3 CTS and UART4 CTS, which I added as a test. I then proceeded to add the uart1 device itself to the DTS, and added the following: uart1: serial@48022000 { compatible = "ns16550"; reg = <0x48022000 0x1000>; reg-shift = <2>; interrupts = < 73 >; interrupt-parent = <&AINTC>; clock-frequency = < 48000000 >; }; This caused the kernel to dump me in db (debugger I guess). I figured out that 't' gave me a trace, and it looked like it was in the middle of probing for UARTS. (This is about as much knowledge I have about the kernel debugger) I tried changing 0x1000 for 0x2000, as it seems the next reg is also reserved for UART1. No more luck. So, thinking I needed to add it as an alias (as UART0 is), I added that, but it still dumped me at the debugger on boot. The only other thing is reg-shift. I must confess, I am a bit blind here. Not knowing what it actually did I left it as with UART0. I'm hoping it essentially includes the next register up for UART1, as while that's listed as "Reserved" in the memory map [Yes, I consulted SPRUH73G :)] , it seems to be reserved for UART1, but I am just guessing (Yes, I know, not good practice when kernel hacking...) I've attached the latest version of my patch, the output from the kernel until it blows up, as well as the trace. Patch is based on r246610 Anyone able to point me in the right direction ? I can't be too far away, and I can then add UART2-5, and submit an actual working patch! All the Best Iain --------------020507070308010604080403 Content-Type: text/x-patch; name="beaglebone.uart1.patch" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="beaglebone.uart1.patch" 41a42 > uart1 = &uart1; 129a131,132 > "LCD_DATA10", "uart3_ctsn", "input_pulldown", > "LCD_DATA12", "uart4_ctsn", "input_pulldown", 145c148,152 < "GPMC_AD9", "ehrpwm2B", "output"; --- > "GPMC_AD9", "ehrpwm2B", "output", > "UART1_RXD","uart1_rxd","input", > "UART1_TXD","uart1_txd","output", > "I2C2_SCL","uart1_rtsn","output", > "I2C2_SDA","uart1_ctsn","input_pulldown"; 192c199,208 < --- > > uart1: serial@48022000 { > compatible = "ns16550"; > reg = <0x48022000 0x1000>; > reg-shift = <2>; > interrupts = < 73 >; > interrupt-parent = <&AINTC>; > clock-frequency = < 48000000 >; > }; > --------------020507070308010604080403 Content-Type: text/plain; charset=UTF-8; name="boot_msgs_uart1" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="boot_msgs_uart1" FreeBSD/armv6 U-Boot loader, Revision 1.2 (root@fci386.localdomain, Sat Feb 2 23:58:42 PST 2013) DRAM: 256MB Device: disk - /boot/kernel/kernel data=0x3f2ab8+0x21e28 syms=[0x4+0x8a5f0+0x4+0x6abc6] Hit [Enter] to boot immediately, or any other key for command prompt. Booting [/boot/kernel/kernel]... fdt_start: 0x005C8A90 Kernel entry at 0x80200100... Kernel args: (null) KDB: debugger backends: ddb KDB: current backend: ddb Copyright (c) 1992-2013 The FreeBSD Project. Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994 The Regents of the University of California. All rights reserved. FreeBSD is a registered trademark of The FreeBSD Foundation. FreeBSD 10.0-CURRENT #7 r246610M: Fri Feb 15 10:46:57 UTC 2013 root@beaglebone:/usr/obj/usr/src/sys/BEAGLEBONE arm gcc version 4.2.1 20070831 patched [FreeBSD] CPU: Cortex A8-r3 rev 2 (Cortex-A core) Supported features: ARM_ISA THUMB2 JAZELLE THUMBEE ARMv4 Security_Ext WB disabled EABT branch prediction enabled LoUU:2 LoC:2 LoUIS:1 Cache level 1: 32KB/64B 4-way data cache WT WB Read-Alloc 32KB/64B 4-way instruction cache Read-Alloc Cache level 2: 256KB/64B 8-way unified cache WT WB Read-Alloc Write-Alloc real memory = 268435456 (256 MB) avail memory = 255156224 (243 MB) Texas Instruments AM3358 Processor, Revision ES1.0 random device not loaded; using insecure entropy simplebus0: on fdtbus0 aintc0: mem 0xcf160000-0xcf160fff on simplebus0 aintc0: Revision 5.0 ti_scm0: mem 0xe4e10000-0xe4e11fff on simplebus0 setting internal 70 for I2C0_SDA setting internal 70 for I2C0_SCL setting internal 20 for gmii1_rxerr setting internal 0 for gmii1_txen setting internal 20 for gmii1_rxdv setting internal 0 for gmii1_txd3 setting internal 0 for gmii1_txd2 setting internal 0 for gmii1_txd1 setting internal 0 for gmii1_txd0 setting internal 20 for gmii1_txclk setting internal 20 for gmii1_rxclk setting internal 20 for gmii1_rxd3 setting internal 20 for gmii1_rxd2 setting internal 20 for gmii1_rxd1 setting internal 20 for gmii1_rxd0 setting internal 30 for mdio_data setting internal 10 for mdio_clk setting internal 30 for mmc0_cmd setting internal 30 for mmc0_clk setting internal 30 for mmc0_dat0 setting internal 30 for mmc0_dat1 setting internal 30 for mmc0_dat2 setting internal 30 for mmc0_dat3 setting internal 27 for gpio0_7 setting internal 27 for gpio0_26 setting internal 27 for gpio0_27 setting internal 27 for gpio1_0 setting internal 27 for gpio1_1 setting internal 27 for gpio1_2 setting internal 27 for gpio1_3 setting internal 27 for gpio1_4 setting internal 27 for gpio1_5 setting internal 27 for gpio1_6 setting internal 27 for gpio1_7 setting internal 27 for gpio1_12 setting internal 27 for gpio1_13 setting internal 27 for gpio1_14 setting internal 27 for gpio1_15 setting internal 27 for gpio1_16 setting internal 27 for gpio1_17 setting internal 7 for gpio1_21 setting internal 7 for gpio1_22 setting internal 7 for gpio1_23 setting internal 7 for gpio1_24 setting internal 27 for gpio1_28 setting internal 27 for gpio1_29 setting internal 27 for gpio1_30 setting internal 27 for gpio1_31 setting internal 27 for gpio2_1 setting internal 27 for gpio2_6 setting internal 27 for gpio2_7 setting internal 27 for gpio2_8 setting internal 27 for gpio2_9 setting internal 27 for gpio2_10 setting internal 27 for gpio2_11 setting internal 27 for gpio2_12 setting internal 27 for gpio2_13 setting internal 26 for uart3_ctsn setting internal 26 for uart4_ctsn setting internal 27 for gpio2_22 setting internal 27 for gpio2_23 setting internal 27 for gpio2_24 setting internal 27 for gpio2_25 setting internal 27 for gpio3_19 setting internal 27 for gpio3_21 setting internal 2 for timer4 setting internal 2 for timer5 setting internal 2 for timer6 setting internal 2 for timer7 setting internal 6 for ehrpwm1A setting internal 6 for ehrpwm1B setting internal 4 for ehrpwm2A setting internal 4 for ehrpwm2B setting internal 28 for uart1_rxd setting internal 0 for uart1_txd am335x_prcm0: mem 0xe4e00000-0xe4e012ff on simplebus0 am335x_prcm0: Clocks: System 24.0 MHz, CPU 500 MHz am335x_dmtimer0: mem 0xe4e05000-0xe4e05fff,0xe4e31000-0xe4e31fff,0xcf161000-0xcf161fff,0xcf162000-0xcf162fff,0xcf163000-0xcf163fff,0xcf164000-0xcf164fff,0xcf165000-0xcf165fff,0xcf166000-0xcf166fff irq 66,67,68,69,92,93,94,95 on simplebus0 Timecounter "AM335x Timecounter" frequency 24000000 Hz quality 1000 Event timer "AM335x Eventtimer0" frequency 24000000 Hz quality 1000 gpio0: mem 0xe4e07000-0xe4e07fff,0xcf167000-0xcf167fff,0xcf168000-0xcf168fff,0xcf169000-0xcf169fff irq 96,97,98,99,32,33,62,63 on simplebus0 gpioc0: on gpio0 gpiobus0: on gpio0 uart0: <16750 or compatible> mem 0xe4e09000-0xe4e09fff irq 72 on simplebus0 uart0: console (115384,n,8,1) Fatal kernel mode data abort: 'External Non-Linefetch Abort (S)' trapframe: 0xc071db3c FSR=00001008, FAR=cf16a008, spsr=60000093 r0 =00000000, r1 =cf16a000, r2 =00000008, r3 =c05f0b94 r4 =c1bd3608, r5 =c1bd3600, r6 =00000000, r7 =c1c56200 r8 =c1bd3608, r9 =00000002, r10=00000000, r11=c071db98 r12=00000002, ssp=c071db88, slr=c025792c, pc =c04f52ac [ thread pid 0 tid 100000 ] Stopped at generic_bs_r_1: ldrb r0, [r1, r2] db> t Tracing pid 0 tid 100000 td 0xc05f9800 db_trace_self() at db_trace_self+0xc scp=0xc04f90a4 rlv=0xc04f90f0 (db_trace_thread+0x38) rsp=0xc071d82c rfp=0xc071d838 db_trace_thread() at db_trace_thread+0xc scp=0xc04f90c4 rlv=0xc022a1b0 (db_stack_trace+0xe4) rsp=0xc071d83c rfp=0xc071d858 db_stack_trace() at db_stack_trace+0xc scp=0xc022a0d8 rlv=0xc0229858 (db_command+0x2d8) rsp=0xc071d85c rfp=0xc071d900 r5=0x00000000 r4=0xc05c8350 db_command() at db_command+0xc scp=0xc022958c rlv=0xc02299c4 (db_command_loop+0x60) rsp=0xc071d904 rfp=0xc071d910 r10=0x60000193 r8=0x00001008 r7=0x00000000 r6=0xcf16a008 r5=0xc05c8660 r4=0xc071d91c db_command_loop() at db_command_loop+0xc scp=0xc0229970 rlv=0xc022be88 (db_trap+0xec) rsp=0xc071d914 rfp=0xc071da30 db_trap() at db_trap+0xc scp=0xc022bda8 rlv=0xc0380c70 (kdb_trap+0xa4) rsp=0xc071da34 rfp=0xc071da58 r4=0xc071db3c kdb_trap() at kdb_trap+0xc scp=0xc0380bd8 rlv=0xc0507734 (dab_fatal+0x194) rsp=0xc071da5c rfp=0xc071da78 r10=0xc071db3c r8=0xc1bd3608 r7=0xc05f9800 r6=0xcf16a008 r5=0x00001008 r4=0xc071db3c dab_fatal() at dab_fatal+0xc scp=0xc05075ac rlv=0xc0507aa8 (dab_buserr+0x64) rsp=0xc071da7c rfp=0xc071da94 r6=0x00000000 r5=0xc05f9800 r4=0xc071db3c dab_buserr() at dab_buserr+0xc scp=0xc0507a50 rlv=0xc0507c78 (data_abort_handler+0x120) rsp=0xc071da98 rfp=0xc071db38 r5=0xc1bd3600 r4=0xc06111e8 data_abort_handler() at data_abort_handler+0xc scp=0xc0507b64 rlv=0xc04fa8a8 (exception_exit) rsp=0xc071db3c rfp=0xc071db98 r10=0x00000000 r9=0x00000002 r8=0xc1bd3608 r7=0xc1c56200 r6=0x00000000 r5=0xc1bd3600 r4=0xc1bd3608 ns8250_probe() at ns8250_probe+0xc scp=0xc0257908 rlv=0xc0257dd0 (ns8250_bus_probe+0x20) rsp=0xc071db9c rfp=0xc071dbcc r4=0x00000000 ns8250_bus_probe() at ns8250_bus_probe+0xc scp=0xc0257dbc rlv=0xc025663c (uart_bus_probe+0x1b8) rsp=0xc071dbd0 rfp=0xc071dc10 r10=0x00000000 r9=0x00000002 r8=0xc1bd363c r7=0xc1c56200 r6=0x00000000 r5=0xc1bd3600 r4=0x00000000 uart_bus_probe() at uart_bus_probe+0xc scp=0xc0256490 rlv=0xc0255fcc (uart_fdt_probe+0xf8) rsp=0xc071dc14 rfp=0xc071dc38 r10=0x00000000 r9=0x00000000 r8=0xc1c43d80 r7=0x00000000 r6=0xc1c56200 r5=0x00000000 r4=0x00000e80 uart_fdt_probe() at uart_fdt_probe+0xc scp=0xc0255ee0 rlv=0xc037c1ac (device_probe_child+0x1a0) rsp=0xc071dc3c rfp=0xc071dc68 r6=0x00000000 r5=0xc1c56200 r4=0xc1bd8000 device_probe_child() at device_probe_child+0xc scp=0xc037c018 rlv=0xc037c444 (device_probe+0x8c) rsp=0xc071dc6c rfp=0xc071dc84 r10=0xc1bfd780 r9=0xc1bfd780 r8=0xc1c20d80 r7=0xc1c20d94 r6=0xc1bfd780 r5=0xc1c20d80 r4=0xc1c56200 device_probe() at device_probe+0xc scp=0xc037c3c4 rlv=0xc037c518 (device_probe_and_attach+0x2c) rsp=0xc071dc88 rfp=0xc071dc98 r6=0xc1bfd780 r5=0xc1c20d80 r4=0xc1c56200 device_probe_and_attach() at device_probe_and_attach+0xc scp=0xc037c4f8 rlv=0xc037c5f8 (bus_generic_attach+0x20) rsp=0xc071dc9c rfp=0xc071dcac r4=0xc1c56200 bus_generic_attach() at bus_generic_attach+0xc scp=0xc037c5e4 rlv=0xc02321a8 (simplebus_attach+0x1cc) rsp=0xc071dcb0 rfp=0xc071dcd0 r4=0x00000000 simplebus_attach() at simplebus_attach+0xc scp=0xc0231fe8 rlv=0xc037b800 (device_attach+0x320) rsp=0xc071dcd4 rfp=0xc071dd10 r8=0xffffffff r7=0xc052be4c r6=0xc1bfd7d0 r5=0x80000003 r4=0xc1bfd880 device_attach() at device_attach+0xc scp=0xc037b4ec rlv=0xc037c534 (device_probe_and_attach+0x48) rsp=0xc071dd14 rfp=0xc071dd24 r10=0xc1bd7080 r8=0xc1bfd880 r7=0x00000000 r6=0x00000000 r5=0xc1bfd710 r4=0xc1bfd780 device_probe_and_attach() at device_probe_and_attach+0xc scp=0xc037c4f8 rlv=0xc037c5f8 (bus_generic_attach+0x20) rsp=0xc071dd28 rfp=0xc071dd38 r4=0xc1bfd780 bus_generic_attach() at bus_generic_attach+0xc scp=0xc037c5e4 rlv=0xc0231c24 (fdtbus_attach+0x564) rsp=0xc071dd3c rfp=0xc071ddb0 r4=0xc051f5ec fdtbus_attach() at fdtbus_attach+0xc scp=0xc02316cc rlv=0xc037b800 (device_attach+0x320) rsp=0xc071ddb4 rfp=0xc071ddf0 r10=0xc1bfd880 r9=0xc070d000 r8=0xffffffff r7=0xc052be4c r6=0xc1bfd8d0 r5=0x80000003 r4=0xc0379320 device_attach() at device_attach+0xc scp=0xc037b4ec rlv=0xc037c534 (device_probe_and_attach+0x48) rsp=0xc071ddf4 rfp=0xc071de04 r10=0xc1c20080 r8=0xffffffff r7=0xc052be4c r6=0xc1c20080 r5=0xffffffff r4=0xc1bfd880 device_probe_and_attach() at device_probe_and_attach+0xc scp=0xc037c4f8 rlv=0xc037c5f8 (bus_generic_attach+0x20) rsp=0xc071de08 rfp=0xc071de18 r4=0xc1bfd880 bus_generic_attach() at bus_generic_attach+0xc scp=0xc037c5e4 rlv=0xc04fe620 (nexus_attach+0x70) rsp=0xc071de1c rfp=0xc071de34 r4=0xc06132fc nexus_attach() at nexus_attach+0xc scp=0xc04fe5bc rlv=0xc037b800 (device_attach+0x320) rsp=0xc071de38 rfp=0xc071de74 r6=0xc1c200d0 r5=0x80000003 r4=0xc0379320 device_attach() at device_attach+0xc scp=0xc037b4ec rlv=0xc037c534 (device_probe_and_attach+0x48) rsp=0xc071de78 rfp=0xc071de88 r10=0x88048970 r8=0x880466c8 r7=0x8020014c r6=0xc1bfc380 r5=0xc05ef268 r4=0xc1c20080 device_probe_and_attach() at device_probe_and_attach+0xc scp=0xc037c4f8 rlv=0xc037c8b4 (bus_generic_new_pass+0xec) rsp=0xc071de8c rfp=0xc071dea4 r4=0xc1c20080 bus_generic_new_pass() at bus_generic_new_pass+0xc scp=0xc037c7d4 rlv=0xc037a6a4 (bus_set_pass+0x9c) rsp=0xc071dea8 rfp=0xc071dec0 r6=0x7fffffff r5=0xc1bfc380 r4=0xc1bd86c0 bus_set_pass() at bus_set_pass+0xc scp=0xc037a614 rlv=0xc037a704 (root_bus_configure+0x14) rsp=0xc071dec4 rfp=0xc071ded0 r6=0x8ff84cfc r5=0x80200158 r4=0xc05808ac root_bus_configure() at root_bus_configure+0xc scp=0xc037a6fc rlv=0xc04f40bc (configure+0x10) rsp=0xc071ded4 rfp=0xc071dee0 configure() at configure+0xc scp=0xc04f40b8 rlv=0xc030516c (mi_startup+0xf8) rsp=0xc071dee4 rfp=0xc071def4 mi_startup() at mi_startup+0xc scp=0xc0305080 rlv=0xc0200218 (virt_done+0x30) rsp=0xc071def8 rfp=0x00000000 r4=0x80200258 --------------020507070308010604080403--