Date: Tue, 24 Nov 2009 08:35:11 +0000 (UTC) From: Warner Losh <imp@FreeBSD.org> To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r199742 - projects/mips/sys/mips/mips Message-ID: <200911240835.nAO8ZB4v010772@svn.freebsd.org>
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Author: imp Date: Tue Nov 24 08:35:11 2009 New Revision: 199742 URL: http://svn.freebsd.org/changeset/base/199742 Log: Move the hard-wiring of the dcache on octeon outside of the if statement. When no caches support was added, it looks like TARGET_OCTEON was bogusly moved inside the if. Also, include opt_cputype.h to make TARGET_OCTEON actually active. # now we die in pmap init somewhere... Most likely because 32MB of RAM is # too tight given the load address we're using. Modified: projects/mips/sys/mips/mips/cpu.c Modified: projects/mips/sys/mips/mips/cpu.c ============================================================================== --- projects/mips/sys/mips/mips/cpu.c Tue Nov 24 08:21:48 2009 (r199741) +++ projects/mips/sys/mips/mips/cpu.c Tue Nov 24 08:35:11 2009 (r199742) @@ -49,6 +49,8 @@ __FBSDID("$FreeBSD$"); #include <machine/pte.h> #include <machine/hwfunc.h> +#include "opt_cputype.h" + static struct mips_cpuinfo cpuinfo; union cpuprid cpu_id; @@ -113,18 +115,18 @@ mips_get_identity(struct mips_cpuinfo *c (((cfg1 & MIPS_CONFIG1_DA_MASK) >> MIPS_CONFIG1_DA_SHIFT)) + 1; cpuinfo->l1.dc_nsets = 1 << (((cfg1 & MIPS_CONFIG1_DS_MASK) >> MIPS_CONFIG1_DS_SHIFT) + 6); + } #ifdef TARGET_OCTEON - /* - * Octeon does 128 byte line-size. But Config-Sel1 doesn't show - * 128 line-size, 1 Set, 64 ways. - */ - cpuinfo->l1.dc_linesize = 128; - cpuinfo->l1.dc_nsets = 1; - cpuinfo->l1.dc_nways = 64; + /* + * Octeon does 128 byte line-size. But Config-Sel1 doesn't show + * 128 line-size, 1 Set, 64 ways. + */ + cpuinfo->l1.dc_linesize = 128; + cpuinfo->l1.dc_nsets = 1; + cpuinfo->l1.dc_nways = 64; #endif - cpuinfo->l1.dc_size = cpuinfo->l1.dc_linesize - * cpuinfo->l1.dc_nsets * cpuinfo->l1.dc_nways; - } + cpuinfo->l1.dc_size = cpuinfo->l1.dc_linesize + * cpuinfo->l1.dc_nsets * cpuinfo->l1.dc_nways; } void
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