From owner-freebsd-current Thu Feb 8 13:21:49 2001 Delivered-To: freebsd-current@freebsd.org Received: from mail.du.gtn.com (mail.du.gtn.com [194.77.9.57]) by hub.freebsd.org (Postfix) with ESMTP id 60E4D37B401 for ; Thu, 8 Feb 2001 13:21:31 -0800 (PST) Received: from mail.cicely.de (cicely.de [194.231.9.142]) by mail.du.gtn.com (8.11.0.Beta3/8.11.0.Beta3) with ESMTP id f18LL8V19716 (using TLSv1/SSLv3 with cipher EDH-RSA-DES-CBC3-SHA (168 bits) verified OK) for ; Thu, 8 Feb 2001 22:21:25 +0100 (MET) Received: from cicely5.cicely.de (cicely5.cicely.de [fec0:0:0:104::5]) by mail.cicely.de (8.11.0.Beta1/8.11.0.Beta1) with ESMTP id f18LLWP80518 (using TLSv1/SSLv3 with cipher EDH-RSA-DES-CBC3-SHA (168 bits) verified NO) for ; Thu, 8 Feb 2001 22:21:35 +0100 (CET) Received: (from ticso@localhost) by cicely5.cicely.de (8.11.1/8.11.1) id f18LLW681415 for freebsd-current@FreeBSD.ORG; Thu, 8 Feb 2001 22:21:32 +0100 (CET) (envelope-from ticso) Date: Thu, 8 Feb 2001 22:21:32 +0100 From: Bernd Walter To: freebsd-current@FreeBSD.ORG Subject: Re: atomic_ question Message-ID: <20010208222131.D81067@cicely5.cicely.de> References: <20010208182106.B80741@cicely5.cicely.de> <20010209075749.Z90937@gsmx07.alcatel.com.au> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Mailer: Mutt 1.0.1i In-Reply-To: <20010209075749.Z90937@gsmx07.alcatel.com.au>; from peter.jeremy@alcatel.com.au on Fri, Feb 09, 2001 at 07:57:50AM +1100 Sender: owner-freebsd-current@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.ORG On Fri, Feb 09, 2001 at 07:57:50AM +1100, Peter Jeremy wrote: > On 2001-Feb-08 18:21:07 +0100, Bernd Walter wrote: > >Are atomic_* implementations allowed to spin/sleep? > > The atomic_* operations are the primitives used to build all the > higher level locking functions. Therefore you are not allowed to > sleep. > > As for spinning: You can't implement them using a `normal' spinlock. > Some architectures, eg the Alpha, don't have RMW primitives. The > Alpha has load-locked and store-conditional instructions which let you > build atomic operations - you need to spin between the load and store > if the store fails. The store will only fail if you took an interrupt > between the load and store or if another master updated the location > between your load and store. Look into /sys/alpha/alpha/atomic.s for > code. The alpha way of doing it is very similar to sparcv9. But the alpha code and the code neccesary for sparcv9 has a difference compared to normal spinning. If you get interrupted the interupt code can modify the same value without getting blocked while the interrupted code simply needs another cycle. On sparcv8 you don't have an operation doing conditionaly stores and you don't have RMW operations. The only way to do is to have a global lock variable on which you spin until the current client finishes. That means you can't use them in interrupt code! I saw that some implementations for atomic code for sparcv8 disables interrupts before fetching the lock to suround this problem. Do we grant usuage of the atomic functions in interrupt code? If yes there is a need to disable interrupts! I'm not talking about interrupt threads. -- B.Walter COSMO-Project http://www.cosmo-project.de ticso@cicely.de Usergroup info@cosmo-project.de To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-current" in the body of the message