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From: Bakul Shah <bakul@bitblocks.com>
Subject: Re: Fast cycle counter for ARM chips with SCC - patch for review.
Date: Sat, 10 May 2014 11:07:38 -0700
To: Mark R V Murray <markm@FreeBSD.org>
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FYI: BCM2835 has a built in h/w RNG (using a reverse biased transistor as an=
 entropy source). Access to it was enabled in the RPi firmware around Jan 30=
, 2013. FWIW, it passes rngtest as well as FreeBSD's /dev/random (on x86/amd=
64) does.
For the spec. see http://pastehtml.com/view/crkxyohmp.rtxt
Referenced from this thread: http://www.raspberrypi.org/forums/viewtopic.php=
?f=3D29&t=3D19334&p=3D273944#p273944

> On May 10, 2014, at 10:39 AM, Mark R V Murray <markm@FreeBSD.org> wrote:
>=20
> Hi *
>=20
> This patch makes the ARM6 kernels that have an SCC coprocessor (RPI and WA=
NDBOARD have them) get a MUCH better implementation of get_cyclecount(9), bu=
t not a perfect one. The incrementing rate is good (+- 1 per instruction), b=
ut its only 32 bits. Later, if there is interest, I may wish to fix that wit=
h an overflow interrupt, but for now its easily good enough for the kernel e=
ntropy harvesting service. Also, its MUUUCH more efficient; a simple read ra=
ther can calling the internal kernel binuptime(9) clock.
>=20
> Comments, please? I=E2=80=99m keen to commit.
>=20
> M
> --=20
> Mark R V Murray
> <arm_ccnt_counter.diff>
>=20