Date: Tue, 1 Jul 2003 22:08:13 -0700 From: Marcel Moolenaar <marcel@xcllnt.net> To: sparc64@freebsd.org Subject: Re: OFW_NEWPCI dmesg diffs Message-ID: <20030702050813.GA11423@dhcp01.pn.xcllnt.net> In-Reply-To: <20030702040928.GC58048@funkthat.com> References: <20030702040139.GA11199@dhcp01.pn.xcllnt.net> <20030702040928.GC58048@funkthat.com>
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On Tue, Jul 01, 2003 at 09:09:28PM -0700, John-Mark Gurney wrote: > > But, I the problem is that both soft interrupts and vector interrupts > are useful to know. All vector interrupts are dispatched via soft > interrupts, so if we count both, the interrupt count is double. We > need soft interrupts if we want to see the clock ticking. *snip* > notice that ithrd is equal to gem0 + gem1 + atapci0. pil is the > priority interrupt level (aka soft interrupts). > > Comments? Do we count both? or not include soft interrupts? or not > include the ithrd pil? I don't know enough about sparc, but can't you count clock interrupts in tick_hardclock() and not count soft interrupts at all? -- Marcel Moolenaar USPA: A-39004 marcel@xcllnt.net
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