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Date:      Tue, 6 Aug 2019 17:23:37 +0200
From:      Milan Obuch <freebsd-arm@dino.sk>
To:        freebsd-arm@freebsd.org
Subject:   Re: Attempt to use uart0 on Zybo Z7
Message-ID:  <20190806172337.31f87439@zeta.dino.sk>
In-Reply-To: <20190806161415.4be2a991@zeta.dino.sk>
References:  <20190803091019.2d067756@zeta.dino.sk> <20190806161415.4be2a991@zeta.dino.sk>

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On Tue, 6 Aug 2019 16:14:15 +0200
Milan Obuch <freebsd-arm@dino.sk> wrote:

> On Sat, 3 Aug 2019 09:10:19 +0200
> Milan Obuch <freebsd-arm@dino.sk> wrote:
> 
> > Hi,
> > 
> > Zynq SoC has several peripherals available on its PS/ARM side of
> > thing. Currently supported list contains UART, USB, ethernet, SDIO
> > and GPIO. No driver yet for SPI, I2C and CAN.
> > 
> > Available GPIO pins are on JF6 (MIO pmod connector), I tested them
> > as inputs and they are working as expected.  
> 

After some testing I found a way to enable uart0. Currently only
devices initialized by u-boot could be used, I think, and uart0 had no
clocks initialized. Now my hardware loopback works, I am going to
connect TTL-RS232 level converter and/or USB/UART convertor to check
from other box.

Summary:

zy7_slcr_unlock(sc);
WR4(sc, ZY7_SLCR_MIO_PIN(14), 0x16E1);
WR4(sc, ZY7_SLCR_MIO_PIN(15), 0x16E0);

j = RD4(sc, ZY7_SLCR_APER_CLK_CTRL);
WR4(sc, ZY7_SLCR_APER_CLK_CTRL, j | ZY7_SLCR_APER_CLK_CTRL_UART0_CPU_1XCLKACT);

j = RD4(sc, ZY7_SLCR_UART_CLK_CTRL);
WR4(sc, ZY7_SLCR_UART_CLK_CTRL, j | 1);

This makes necessary MIO routing change, enables APB and refererence
clocks for uart0. I put this at end of zy7_slcr_attach() function as
mentioned in original mail.

Now the question is how to do this properly - we have no pinmux and
clock infrastructure for Zynq yet.

Regards,
Milan



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