From owner-svn-src-all@FreeBSD.ORG Mon Mar 30 09:29:48 2015 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 4AEA2BD0; Mon, 30 Mar 2015 09:29:48 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 351676F; Mon, 30 Mar 2015 09:29:48 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t2U9TmhJ081889; Mon, 30 Mar 2015 09:29:48 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t2U9TkOe081884; Mon, 30 Mar 2015 09:29:46 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201503300929.t2U9TkOe081884@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Mon, 30 Mar 2015 09:29:46 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r280847 - in head/sys: arm/arm arm/include conf X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 30 Mar 2015 09:29:48 -0000 Author: andrew Date: Mon Mar 30 09:29:45 2015 New Revision: 280847 URL: https://svnweb.freebsd.org/changeset/base/280847 Log: Remove support for CPU_XSCALE_80200. None of our configs support it, and there wasn;t an option to enable it. While here remove a check for CPU_ARM10 being defined as it has also been removed. Modified: head/sys/arm/arm/cpufunc.c head/sys/arm/arm/elf_trampoline.c head/sys/arm/include/cpuconf.h head/sys/arm/include/cpufunc.h head/sys/conf/files.arm Modified: head/sys/arm/arm/cpufunc.c ============================================================================== --- head/sys/arm/arm/cpufunc.c Mon Mar 30 09:08:24 2015 (r280846) +++ head/sys/arm/arm/cpufunc.c Mon Mar 30 09:29:45 2015 (r280847) @@ -60,11 +60,6 @@ __FBSDID("$FreeBSD$"); #include #include -#ifdef CPU_XSCALE_80200 -#include -#include -#endif - #if defined(CPU_XSCALE_80321) || defined(CPU_XSCALE_80219) #include #include @@ -362,7 +357,7 @@ struct cpu_functions pj4bv7_cpufuncs = { }; #endif /* CPU_MV_PJ4B */ -#if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ +#if defined(CPU_XSCALE_80321) || \ defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \ defined(CPU_XSCALE_80219) @@ -427,7 +422,7 @@ struct cpu_functions xscale_cpufuncs = { xscale_setup /* cpu setup */ }; #endif -/* CPU_XSCALE_80200 || CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425 +/* CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425 CPU_XSCALE_80219 */ #ifdef CPU_XSCALE_81342 @@ -703,7 +698,7 @@ u_int cpu_reset_needs_v4_MMU_disable; /* #if defined(CPU_ARM9) || \ defined (CPU_ARM9E) || \ - defined(CPU_ARM1176) || defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ + defined(CPU_ARM1176) || defined(CPU_XSCALE_80321) || \ defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \ defined(CPU_FA526) || defined(CPU_MV_PJ4B) || \ defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) || \ @@ -957,47 +952,6 @@ set_cpufuncs() } #endif /* CPU_FA526 */ -#ifdef CPU_XSCALE_80200 - if (cputype == CPU_ID_80200) { - int rev = cpufunc_id() & CPU_ID_REVISION_MASK; - - i80200_icu_init(); - -#if defined(XSCALE_CCLKCFG) - /* - * Crank CCLKCFG to maximum legal value. - */ - __asm __volatile ("mcr p14, 0, %0, c6, c0, 0" - : - : "r" (XSCALE_CCLKCFG)); -#endif - - /* - * XXX Disable ECC in the Bus Controller Unit; we - * don't really support it, yet. Clear any pending - * error indications. - */ - __asm __volatile("mcr p13, 0, %0, c0, c1, 0" - : - : "r" (BCUCTL_E0|BCUCTL_E1|BCUCTL_EV)); - - cpufuncs = xscale_cpufuncs; - /* - * i80200 errata: Step-A0 and A1 have a bug where - * D$ dirty bits are not cleared on "invalidate by - * address". - * - * Workaround: Clean cache line before invalidating. - */ - if (rev == 0 || rev == 1) - cpufuncs.cf_dcache_inv_range = xscale_cache_purgeD_rng; - - cpu_reset_needs_v4_MMU_disable = 1; /* XScale needs it */ - get_cachetype_cp15(); - pmap_pte_init_xscale(); - goto out; - } -#endif /* CPU_XSCALE_80200 */ #if defined(CPU_XSCALE_80321) || defined(CPU_XSCALE_80219) if (cputype == CPU_ID_80321_400 || cputype == CPU_ID_80321_600 || cputype == CPU_ID_80321_400_B0 || cputype == CPU_ID_80321_600_B0 || @@ -1417,7 +1371,7 @@ fa526_setup(void) } #endif /* CPU_FA526 */ -#if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ +#if defined(CPU_XSCALE_80321) || \ defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \ defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) void @@ -1486,5 +1440,5 @@ xscale_setup(void) __asm __volatile("mcr p15, 0, %0, c1, c0, 1" : : "r" (auxctl)); } -#endif /* CPU_XSCALE_80200 || CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425 +#endif /* CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425 CPU_XSCALE_80219 */ Modified: head/sys/arm/arm/elf_trampoline.c ============================================================================== --- head/sys/arm/arm/elf_trampoline.c Mon Mar 30 09:08:24 2015 (r280846) +++ head/sys/arm/arm/elf_trampoline.c Mon Mar 30 09:29:45 2015 (r280847) @@ -67,7 +67,7 @@ extern void fa526_idcache_wbinv_all(void extern void armv5_ec_idcache_wbinv_all(void); #elif defined(CPU_ARM1176) #define cpu_idcache_wbinv_all armv6_idcache_wbinv_all -#elif defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ +#elif defined(CPU_XSCALE_80321) || \ defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \ defined(CPU_XSCALE_80219) #define cpu_idcache_wbinv_all xscale_cache_purgeID Modified: head/sys/arm/include/cpuconf.h ============================================================================== --- head/sys/arm/include/cpuconf.h Mon Mar 30 09:08:24 2015 (r280846) +++ head/sys/arm/include/cpuconf.h Mon Mar 30 09:29:45 2015 (r280847) @@ -53,7 +53,6 @@ #define CPU_NTYPES (defined(CPU_ARM9) + \ defined(CPU_ARM9E) + \ defined(CPU_ARM1176) + \ - defined(CPU_XSCALE_80200) + \ defined(CPU_XSCALE_80321) + \ defined(CPU_XSCALE_PXA2X0) + \ defined(CPU_FA526) + \ @@ -71,8 +70,8 @@ #define ARM_ARCH_4 0 #endif -#if (defined(CPU_ARM9E) || defined(CPU_ARM10) || \ - defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ +#if (defined(CPU_ARM9E) || \ + defined(CPU_XSCALE_80321) || \ defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) || \ defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425)) #define ARM_ARCH_5 1 @@ -146,8 +145,7 @@ * MMU, but also has several extensions which * require different PTE layout to use. */ -#if (defined(CPU_ARM9) || defined(CPU_ARM9E) || \ - defined(CPU_ARM10) || defined(CPU_FA526)) +#if (defined(CPU_ARM9) || defined(CPU_ARM9E) || defined(CPU_FA526)) #define ARM_MMU_GENERIC 1 #else #define ARM_MMU_GENERIC 0 @@ -165,7 +163,7 @@ #define ARM_MMU_V7 0 #endif -#if (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ +#if (defined(CPU_XSCALE_80321) || \ defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \ defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342)) #define ARM_MMU_XSCALE 1 @@ -185,7 +183,7 @@ * ARM_XSCALE_PMU Performance Monitoring Unit on 80200 and 80321 */ -#if (defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ +#if (defined(CPU_XSCALE_80321) || \ defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342)) #define ARM_XSCALE_PMU 1 #else Modified: head/sys/arm/include/cpufunc.h ============================================================================== --- head/sys/arm/include/cpufunc.h Mon Mar 30 09:08:24 2015 (r280846) +++ head/sys/arm/include/cpufunc.h Mon Mar 30 09:29:45 2015 (r280847) @@ -433,7 +433,7 @@ void armv5_ec_idcache_wbinv_range(vm_off #endif #if defined(CPU_ARM9) || defined(CPU_ARM9E) || \ - defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ + defined(CPU_XSCALE_80321) || \ defined(CPU_FA526) || \ defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \ defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) @@ -447,7 +447,7 @@ void armv4_drain_writebuf (void); void armv4_idcache_inv_all (void); #endif -#if defined(CPU_XSCALE_80200) || defined(CPU_XSCALE_80321) || \ +#if defined(CPU_XSCALE_80321) || \ defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) || \ defined(CPU_XSCALE_80219) || defined(CPU_XSCALE_81342) void xscale_cpwait (void); @@ -487,7 +487,7 @@ void xscale_cache_flushD_rng (vm_offset_ void xscale_context_switch (void); void xscale_setup (void); -#endif /* CPU_XSCALE_80200 || CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425 +#endif /* CPU_XSCALE_80321 || CPU_XSCALE_PXA2X0 || CPU_XSCALE_IXP425 CPU_XSCALE_80219 */ #ifdef CPU_XSCALE_81342 Modified: head/sys/conf/files.arm ============================================================================== --- head/sys/conf/files.arm Mon Mar 30 09:08:24 2015 (r280846) +++ head/sys/conf/files.arm Mon Mar 30 09:29:45 2015 (r280847) @@ -13,14 +13,14 @@ arm/arm/cpufunc_asm_arm9.S optional cpu arm/arm/cpufunc_asm_arm10.S optional cpu_arm9e arm/arm/cpufunc_asm_arm11.S optional cpu_arm1176 arm/arm/cpufunc_asm_arm11x6.S optional cpu_arm1176 -arm/arm/cpufunc_asm_armv4.S optional cpu_arm9 | cpu_arm9e | cpu_fa526 | cpu_xscale_80200 | cpu_xscale_80321 | cpu_xscale_pxa2x0 | cpu_xscale_ixp425 | cpu_xscale_80219 | cpu_xscale_81342 +arm/arm/cpufunc_asm_armv4.S optional cpu_arm9 | cpu_arm9e | cpu_fa526 | cpu_xscale_80321 | cpu_xscale_pxa2x0 | cpu_xscale_ixp425 | cpu_xscale_80219 | cpu_xscale_81342 arm/arm/cpufunc_asm_armv5_ec.S optional cpu_arm9e arm/arm/cpufunc_asm_armv6.S optional cpu_arm1176 arm/arm/cpufunc_asm_armv7.S optional cpu_cortexa | cpu_krait | cpu_mv_pj4b arm/arm/cpufunc_asm_fa526.S optional cpu_fa526 arm/arm/cpufunc_asm_pj4b.S optional cpu_mv_pj4b arm/arm/cpufunc_asm_sheeva.S optional cpu_arm9e -arm/arm/cpufunc_asm_xscale.S optional cpu_xscale_80200 | cpu_xscale_80321 | cpu_xscale_pxa2x0 | cpu_xscale_ixp425 | cpu_xscale_80219 | cpu_xscale_81342 +arm/arm/cpufunc_asm_xscale.S optional cpu_xscale_80321 | cpu_xscale_pxa2x0 | cpu_xscale_ixp425 | cpu_xscale_80219 | cpu_xscale_81342 arm/arm/cpufunc_asm_xscale_c3.S optional cpu_xscale_81342 arm/arm/cpuinfo.c standard arm/arm/cpu_asm-v6.S optional armv6