From owner-svn-src-head@FreeBSD.ORG Wed Apr 3 08:27:36 2013 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by hub.freebsd.org (Postfix) with ESMTP id 5E465C6F; Wed, 3 Apr 2013 08:27:36 +0000 (UTC) (envelope-from dumbbell@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) by mx1.freebsd.org (Postfix) with ESMTP id 4260CCB0; Wed, 3 Apr 2013 08:27:36 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.6/8.14.6) with ESMTP id r338Ratn051811; Wed, 3 Apr 2013 08:27:36 GMT (envelope-from dumbbell@svn.freebsd.org) Received: (from dumbbell@localhost) by svn.freebsd.org (8.14.6/8.14.5/Submit) id r338RZih051806; Wed, 3 Apr 2013 08:27:35 GMT (envelope-from dumbbell@svn.freebsd.org) Message-Id: <201304030827.r338RZih051806@svn.freebsd.org> From: Jean-Sebastien Pedron Date: Wed, 3 Apr 2013 08:27:35 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r249041 - in head/sys/dev/drm2: . i915 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Apr 2013 08:27:36 -0000 Author: dumbbell Date: Wed Apr 3 08:27:35 2013 New Revision: 249041 URL: http://svnweb.freebsd.org/changeset/base/249041 Log: drm and i915: Left-shift iic_msg.slave at creation time This is required because, in the radeon driver, we can't left-shift in a central place, like it was done in the i915 driver. Reviewed by: kib@, kan@, avg@ Tested by: kib@, avg@ Modified: head/sys/dev/drm2/drm_edid.c head/sys/dev/drm2/i915/intel_iic.c head/sys/dev/drm2/i915/intel_modes.c head/sys/dev/drm2/i915/intel_sdvo.c Modified: head/sys/dev/drm2/drm_edid.c ============================================================================== --- head/sys/dev/drm2/drm_edid.c Wed Apr 3 06:48:47 2013 (r249040) +++ head/sys/dev/drm2/drm_edid.c Wed Apr 3 08:27:35 2013 (r249041) @@ -264,12 +264,12 @@ drm_do_probe_ddc_edid(device_t adapter, do { struct iic_msg msgs[] = { { - .slave = DDC_ADDR, + .slave = DDC_ADDR << 1, .flags = IIC_M_WR, .len = 1, .buf = &start, }, { - .slave = DDC_ADDR, + .slave = DDC_ADDR << 1, .flags = IIC_M_RD, .len = len, .buf = buf, Modified: head/sys/dev/drm2/i915/intel_iic.c ============================================================================== --- head/sys/dev/drm2/i915/intel_iic.c Wed Apr 3 06:48:47 2013 (r249040) +++ head/sys/dev/drm2/i915/intel_iic.c Wed Apr 3 08:27:35 2013 (r249041) @@ -256,7 +256,7 @@ intel_gmbus_transfer(device_t idev, stru I915_WRITE(GMBUS1 + reg_offset, GMBUS_CYCLE_WAIT | (i + 1 == nmsgs ? GMBUS_CYCLE_STOP : 0) | (len << GMBUS_BYTE_COUNT_SHIFT) | - (msgs[i].slave << GMBUS_SLAVE_ADDR_SHIFT) | + (msgs[i].slave << (GMBUS_SLAVE_ADDR_SHIFT - 1)) | GMBUS_SLAVE_READ | GMBUS_SW_RDY); POSTING_READ(GMBUS2 + reg_offset); do { @@ -287,7 +287,7 @@ intel_gmbus_transfer(device_t idev, stru I915_WRITE(GMBUS1 + reg_offset, GMBUS_CYCLE_WAIT | (i + 1 == nmsgs ? GMBUS_CYCLE_STOP : 0) | (msgs[i].len << GMBUS_BYTE_COUNT_SHIFT) | - (msgs[i].slave << GMBUS_SLAVE_ADDR_SHIFT) | + (msgs[i].slave << (GMBUS_SLAVE_ADDR_SHIFT - 1)) | GMBUS_SLAVE_WRITE | GMBUS_SW_RDY); POSTING_READ(GMBUS2+reg_offset); @@ -397,17 +397,11 @@ intel_iic_quirk_xfer(device_t idev, stru IICBB_SETSCL(bridge_dev, 1); DELAY(I2C_RISEFALL_TIME); - /* convert slave addresses to format expected by iicbb */ - for (i = 0; i < nmsgs; i++) { - msgs[i].slave <<= 1; + for (i = 0; i < nmsgs - 1; i++) { /* force use of repeated start instead of default stop+start */ - if (i != (nmsgs - 1)) - msgs[i].flags |= IIC_M_NOSTOP; + msgs[i].flags |= IIC_M_NOSTOP; } ret = iicbus_transfer(idev, msgs, nmsgs); - /* restore the addresses */ - for (i = 0; i < nmsgs; i++) - msgs[i].slave >>= 1; IICBB_SETSDA(bridge_dev, 1); IICBB_SETSCL(bridge_dev, 1); intel_iic_quirk_set(dev_priv, false); Modified: head/sys/dev/drm2/i915/intel_modes.c ============================================================================== --- head/sys/dev/drm2/i915/intel_modes.c Wed Apr 3 06:48:47 2013 (r249040) +++ head/sys/dev/drm2/i915/intel_modes.c Wed Apr 3 08:27:35 2013 (r249041) @@ -45,13 +45,13 @@ bool intel_ddc_probe(struct intel_encode u8 buf[2]; struct iic_msg msgs[] = { { - .slave = DDC_ADDR, + .slave = DDC_ADDR << 1, .flags = IIC_M_WR, .len = 1, .buf = out_buf, }, { - .slave = DDC_ADDR, + .slave = DDC_ADDR << 1, .flags = IIC_M_RD, .len = 1, .buf = buf, Modified: head/sys/dev/drm2/i915/intel_sdvo.c ============================================================================== --- head/sys/dev/drm2/i915/intel_sdvo.c Wed Apr 3 06:48:47 2013 (r249040) +++ head/sys/dev/drm2/i915/intel_sdvo.c Wed Apr 3 08:27:35 2013 (r249041) @@ -266,13 +266,13 @@ static bool intel_sdvo_read_byte(struct { struct iic_msg msgs[] = { { - .slave = intel_sdvo->slave_addr, + .slave = intel_sdvo->slave_addr << 1, .flags = 0, .len = 1, .buf = &addr, }, { - .slave = intel_sdvo->slave_addr, + .slave = intel_sdvo->slave_addr << 1, .flags = IIC_M_RD, .len = 1, .buf = ch, @@ -454,14 +454,14 @@ intel_sdvo_write_cmd(struct intel_sdvo * intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); for (i = 0; i < args_len; i++) { - msgs[i].slave = intel_sdvo->slave_addr; + msgs[i].slave = intel_sdvo->slave_addr << 1; msgs[i].flags = 0; msgs[i].len = 2; msgs[i].buf = buf + 2 *i; buf[2*i + 0] = SDVO_I2C_ARG_0 - i; buf[2*i + 1] = ((const u8*)args)[i]; } - msgs[i].slave = intel_sdvo->slave_addr; + msgs[i].slave = intel_sdvo->slave_addr << 1; msgs[i].flags = 0; msgs[i].len = 2; msgs[i].buf = buf + 2*i; @@ -470,12 +470,12 @@ intel_sdvo_write_cmd(struct intel_sdvo * /* the following two are to read the response */ status = SDVO_I2C_CMD_STATUS; - msgs[i+1].slave = intel_sdvo->slave_addr; + msgs[i+1].slave = intel_sdvo->slave_addr << 1; msgs[i+1].flags = 0; msgs[i+1].len = 1; msgs[i+1].buf = &status; - msgs[i+2].slave = intel_sdvo->slave_addr; + msgs[i+2].slave = intel_sdvo->slave_addr << 1; msgs[i+2].flags = IIC_M_RD; msgs[i+2].len = 1; msgs[i+2].buf = &status;