Date: Fri, 30 Oct 2009 22:26:12 -0300 From: Mario Lobo <mlobo@digiart.art.br> To: freebsd-current@freebsd.org Subject: Patch for amdtemp Message-ID: <200910302226.12729.mlobo@digiart.art.br>
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[-- Attachment #1 --] Hi; Recently I bought a Phenom II quad and I noticed that amdtemp.ko only displayed 2 temp sysctl values. I started digging the net for some clues and I found a patch from a guy (sorry, don't remember his name any longer) that changed amdtemp for his 3 core amd cpu. I expanded HIS idea to 4 cores and it worked fine, so I'm submitting the patch for testing by other members. [~]>sysctl -a | grep temp hw.usb.template: 0 dev.amdtemp.0.%desc: AMD K8 Thermal Sensors dev.amdtemp.0.%driver: amdtemp dev.amdtemp.0.%parent: hostb4 dev.cpu.0.temperature: 48.0C dev.cpu.1.temperature: 48.0C dev.cpu.2.temperature: 48.0C dev.cpu.3.temperature: 47.8C Since I know before hand how many cores my cpu has, I changed the code for the exact amount of cores but maybe there is a way to detect how many cores the CPU has before creating the sysctl variables. BW -- Mario Lobo http://www.mallavoodoo.com.br FreeBSD since version 2.2.8 [not Pro-Audio.... YET!!] (99,7% winedows FREE) [-- Attachment #2 --] --- amdtemp.c.ori 2009-08-20 17:23:28.000000000 -0300 +++ amdtemp.c.new 2009-10-04 22:42:03.000000000 -0300 @@ -52,10 +52,16 @@ typedef enum { SENSOR0_CORE0, SENSOR0_CORE1, + SENSOR0_CORE2, + SENSOR0_CORE3, SENSOR1_CORE0, SENSOR1_CORE1, + SENSOR1_CORE2, + SENSOR1_CORE3, CORE0, - CORE1 + CORE1, + CORE2, + CORE3 } amdsensor_t; struct amdtemp_softc { @@ -63,7 +69,7 @@ int sc_temps[4]; int sc_ntemps; struct sysctl_oid *sc_oid; - struct sysctl_oid *sc_sysctl_cpu[2]; + struct sysctl_oid *sc_sysctl_cpu[4]; struct intr_config_hook sc_ich; int32_t (*sc_gettemp)(device_t, amdsensor_t); }; @@ -236,7 +242,19 @@ dev, SENSOR0_CORE1, amdtemp_sysctl, "IK", "Sensor 0 / Core 1 temperature"); - sysctlnode = SYSCTL_ADD_NODE(sysctlctx, + SYSCTL_ADD_PROC(sysctlctx, + SYSCTL_CHILDREN(sysctlnode), + OID_AUTO, "core2", CTLTYPE_INT | CTLFLAG_RD, + dev, SENSOR0_CORE2, amdtemp_sysctl, "IK", + "Sensor 0 / Core 2 temperature"); + + SYSCTL_ADD_PROC(sysctlctx, + SYSCTL_CHILDREN(sysctlnode), + OID_AUTO, "core3", CTLTYPE_INT | CTLFLAG_RD, + dev, SENSOR0_CORE3, amdtemp_sysctl, "IK", + "Sensor 0 / Core 3 temperature"); + + sysctlnode = SYSCTL_ADD_NODE(sysctlctx, SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO, "sensor1", CTLFLAG_RD, 0, "Sensor 1"); @@ -252,7 +270,19 @@ dev, SENSOR1_CORE1, amdtemp_sysctl, "IK", "Sensor 1 / Core 1 temperature"); - return (0); + SYSCTL_ADD_PROC(sysctlctx, + SYSCTL_CHILDREN(sysctlnode), + OID_AUTO, "core2", CTLTYPE_INT | CTLFLAG_RD, + dev, SENSOR1_CORE2, amdtemp_sysctl, "IK", + "Sensor 1 / Core 2 temperature"); + + SYSCTL_ADD_PROC(sysctlctx, + SYSCTL_CHILDREN(sysctlnode), + OID_AUTO, "core3", CTLTYPE_INT | CTLFLAG_RD, + dev, SENSOR1_CORE3, amdtemp_sysctl, "IK", + "Sensor 1 / Core 3 temperature"); + + return (0); } void @@ -272,7 +302,7 @@ nexus = device_find_child(root_bus, "nexus", 0); acpi = device_find_child(nexus, "acpi", 0); - for (i = 0; i < 2; i++) { + for (i = 0; i < 4; i++) { cpu = device_find_child(acpi, "cpu", device_get_unit(dev) * 2 + i); if (cpu) { @@ -323,6 +353,16 @@ auxtemp[1] = sc->sc_gettemp(dev, SENSOR1_CORE1); temp = imax(auxtemp[0], auxtemp[1]); break; + case CORE2: + auxtemp[0] = sc->sc_gettemp(dev, SENSOR0_CORE2); + auxtemp[1] = sc->sc_gettemp(dev, SENSOR1_CORE2); + temp = imax(auxtemp[0], auxtemp[1]); + break; + case CORE3: + auxtemp[0] = sc->sc_gettemp(dev, SENSOR0_CORE3); + auxtemp[1] = sc->sc_gettemp(dev, SENSOR1_CORE3); + temp = imax(auxtemp[0], auxtemp[1]); + break; default: temp = sc->sc_gettemp(dev, arg2); break; @@ -347,6 +387,14 @@ cfg &= ~AMDTEMP_REG_SELSENSOR; cfg |= AMDTEMP_REG_SELCORE; break; + case SENSOR0_CORE2: + cfg &= ~AMDTEMP_REG_SELSENSOR; + cfg |= AMDTEMP_REG_SELCORE; + break; + case SENSOR0_CORE3: + cfg &= ~AMDTEMP_REG_SELSENSOR; + cfg |= AMDTEMP_REG_SELCORE; + break; case SENSOR1_CORE0: cfg &= ~AMDTEMP_REG_SELCORE; cfg |= AMDTEMP_REG_SELSENSOR; @@ -354,6 +402,12 @@ case SENSOR1_CORE1: cfg |= (AMDTEMP_REG_SELSENSOR | AMDTEMP_REG_SELCORE); break; + case SENSOR1_CORE2: + cfg |= (AMDTEMP_REG_SELSENSOR | AMDTEMP_REG_SELCORE); + break; + case SENSOR1_CORE3: + cfg |= (AMDTEMP_REG_SELSENSOR | AMDTEMP_REG_SELCORE); + break; default: cfg = 0; break;
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