From owner-freebsd-i386@FreeBSD.ORG Sun Feb 10 01:00:07 2008 Return-Path: Delivered-To: freebsd-i386@hub.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id C2EF216A418 for ; Sun, 10 Feb 2008 01:00:07 +0000 (UTC) (envelope-from gnats@FreeBSD.org) Received: from freefall.freebsd.org (freefall.freebsd.org [IPv6:2001:4f8:fff6::28]) by mx1.freebsd.org (Postfix) with ESMTP id B3CD813C47E for ; Sun, 10 Feb 2008 01:00:07 +0000 (UTC) (envelope-from gnats@FreeBSD.org) Received: from freefall.freebsd.org (gnats@localhost [127.0.0.1]) by freefall.freebsd.org (8.14.2/8.14.2) with ESMTP id m1A107xU047649 for ; Sun, 10 Feb 2008 01:00:07 GMT (envelope-from gnats@freefall.freebsd.org) Received: (from gnats@localhost) by freefall.freebsd.org (8.14.2/8.14.1/Submit) id m1A107Ob047648; Sun, 10 Feb 2008 01:00:07 GMT (envelope-from gnats) Date: Sun, 10 Feb 2008 01:00:07 GMT Message-Id: <200802100100.m1A107Ob047648@freefall.freebsd.org> To: freebsd-i386@FreeBSD.org From: "Oliver B. Warzecha" Cc: Subject: Re: i386/119574: 7.0-RC1 times out in calibrate_clocks() X-BeenThere: freebsd-i386@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list Reply-To: "Oliver B. Warzecha" List-Id: I386-specific issues for FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 10 Feb 2008 01:00:07 -0000 The following reply was made to PR i386/119574; it has been noted by GNATS. From: "Oliver B. Warzecha" To: Bruce Evans Cc: FreeBSD-gnats-submit@freebsd.org, freebsd-i386@freebsd.org Subject: Re: i386/119574: 7.0-RC1 times out in calibrate_clocks() Date: Sun, 10 Feb 2008 01:50:39 +0100 On Sat, Feb 09, 2008 at 05:13:45PM +1100, Bruce Evans wrote: > I happen to have an old BX system online. It is my only system handy > that has an unreadable port 0x70: So maybe someone had realised afterwards that it was a good idea[TM] to make that port readable. > There would only be timing preoblems like that if the hardware is really > primitive or has weird latching semantics. I see no problems with the > index and data register accesses separated by many seconds due to my > typing in the accesses in ddb. So do I. (see below) > I checked your other reference, where the need to rewrite the index > register but not much else is clearly stated. Was that for the 430HX? It is clearly mentioned that this design is based on the 430HX, but this is not detailed further. But it seems this is no longer a point of concern... > It's just "call inb(port) and call outb(port, data)", where inb() and > outb() are ordinary functions whose sole purpose is to let ddb call > them (the kernel uses inline or different versions of these in normal > operations). ddb can call any function (but most not safely, and these I knew only the macro incarnations. No man page either, I was already looking for such functions. :-/ Anyway, I checked, and inb(0x71) consistently returns the current second. While I was at it I also tried 'call rtcin(0)' and it also returns the correct result. So the routine works, taken for itself. The question is, why doesn't it work in the loop? I took some time and singlestepped calibrate_clocks(), needless to say, it all works perfectly that way. As it has to be some kind of timing issue, I went to some effort, maxed out the ISA I/O recovery cycles in the BIOS settings and finally turned the CPU caches off. But although the system was _definitely_ slower with each change, no result. Still timeout. Any idea? I guess I am back to inserting random inb(0x84) for now. Perhaps I missed one combination the last time. :-P OBW