From owner-svn-src-all@FreeBSD.ORG Tue Aug 28 03:46:31 2012 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id BB9AC106566B; Tue, 28 Aug 2012 03:46:31 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id A6FBF8FC14; Tue, 28 Aug 2012 03:46:31 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q7S3kVOl004139; Tue, 28 Aug 2012 03:46:31 GMT (envelope-from imp@svn.freebsd.org) Received: (from imp@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q7S3kVJK004137; Tue, 28 Aug 2012 03:46:31 GMT (envelope-from imp@svn.freebsd.org) Message-Id: <201208280346.q7S3kVJK004137@svn.freebsd.org> From: Warner Losh Date: Tue, 28 Aug 2012 03:46:31 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r239764 - head/sys/arm/at91 X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 28 Aug 2012 03:46:31 -0000 Author: imp Date: Tue Aug 28 03:46:31 2012 New Revision: 239764 URL: http://svn.freebsd.org/changeset/base/239764 Log: Move to using a flag instead of checking the CPU type each transaction for the MCI1 rev 2.x write workarounds. Modified: head/sys/arm/at91/at91_mci.c Modified: head/sys/arm/at91/at91_mci.c ============================================================================== --- head/sys/arm/at91/at91_mci.c Tue Aug 28 03:27:48 2012 (r239763) +++ head/sys/arm/at91/at91_mci.c Tue Aug 28 03:46:31 2012 (r239764) @@ -139,6 +139,7 @@ struct at91_mci_softc { int sc_cap; #define CAP_HAS_4WIRE 1 /* Has 4 wire bus */ #define CAP_NEEDS_BYTESWAP 2 /* broken hardware needing bounce */ +#define CAP_MCI1_REV2XX 4 /* MCI 1 rev 2.x */ int flags; #define PENDING_CMD 0x01 #define PENDING_STOP 0x02 @@ -307,7 +308,7 @@ at91_mci_init(device_t dev) WR4(sc, MCI_DTOR, MCI_DTOR_DTOMUL_1M | 1); val = MCI_MR_PDCMODE; val |= 0x34a; /* PWSDIV = 3; CLKDIV = 74 */ - if (at91_mci_is_mci1rev2xx()) + if (sc->sc_cap & CAP_MCI1_REV2XX) val |= MCI_MR_RDPROOF | MCI_MR_WRPROOF; WR4(sc, MCI_MR, val); #ifndef AT91_MCI_SLOT_B @@ -407,6 +408,12 @@ at91_mci_attach(device_t dev) } /* + * MCI1 Rev 2 controllers need some workarounds, flag if so. + */ + if (at91_mci_is_mci1rev2xx()) + sc->sc_cap |= CAP_MCI1_REV2XX; + + /* * Allow 4-wire to be initially set via #define. * Allow a device hint to override that. * Allow a sysctl to override that. @@ -767,7 +774,7 @@ at91_mci_start_cmd(struct at91_mci_softc * a work-around for the "Data Write Operation and * number of bytes" erratum. */ - if (at91_mci_is_mci1rev2xx() && data->len < 12) { + if ((sc->sc_cap & CAP_MCI1_REV2XX) && data->len < 12) { len = 12; memset(data->data, 0, 12); }