From owner-freebsd-hackers Thu Apr 19 12:36:21 2001 Delivered-To: freebsd-hackers@freebsd.org Received: from nwd2mime2.analog.com (nwd2mime2.analog.com [137.71.25.114]) by hub.freebsd.org (Postfix) with ESMTP id E1E4137B424 for ; Thu, 19 Apr 2001 12:36:17 -0700 (PDT) (envelope-from justin.wojdacki.chiplogic.com@analog.com) Received: from nwd2gtw1 (unverified) by nwd2mime2.analog.com (Content Technologies SMTPRS 4.1.5) with SMTP id for ; Thu, 19 Apr 2001 15:37:13 -0400 Received: from ws4.cpgdesign.analog.com (ws4 [137.71.139.26]) by golf.cpgdesign.analog.com (8.9.1/8.9.1) with ESMTP id MAA03030 for ; Thu, 19 Apr 2001 12:36:00 -0700 (PDT) Received: from chiplogic.com (localhost [127.0.0.1]) by ws4.cpgdesign.analog.com (8.9.1/8.9.1) with ESMTP id MAA04542 for ; Thu, 19 Apr 2001 12:36:04 -0700 (PDT) Message-ID: <3ADF3E24.74661D46@chiplogic.com> Date: Thu, 19 Apr 2001 12:36:04 -0700 From: Justin Wojdacki Reply-To: justin.wojdacki@analog.com Organization: Analog Devices, Communications Processors Group X-Mailer: Mozilla 4.75 [en] (X11; U; SunOS 5.7 sun4u) X-Accept-Language: en MIME-Version: 1.0 To: freebsd-hackers@freebsd.org Subject: Re: The future of multiprocessors (was: SMP in 2.4 (fwd)) References: <20010419121051.D72816@wantadilla.lemis.com> <5.0.2.1.0.20010418190439.03633920@mail.etinc.com> <20010419121051.D72816@wantadilla.lemis.com> <5.1.0.14.0.20010419111106.02d68f50@vssad.hlo.dec.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Sender: owner-freebsd-hackers@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.ORG Michael Adler wrote: > > A number of our larger customers care about computation/cubic foot. The > density of processors is important to them. SMP machines work well here. > > A future Alpha processor will be an SMT (symmetric multi threaded) > machine. Above the lowest levels, it will look like a multi-CPU > machine. The machine will keep multiple thread contexts live within the > CPU and will be capable of switching between these threads in a single > cycle. As it grows harder for compilers to find parallelism within a > single thread we have had to look elsewhere to keep the machine busy. > > -Michael > FWIW: The IBM Power3 CPU (AS/400 boxen) already has multiple hardware threads. IIRC, they don't exploit them largely because the compilers and OS were having a hard time figuring out how to use them. But the hardware can do it, if they so desire. I've found this to be a good general rule: If it's worth doing in computing, IBM's probably already tried it. -- ------------------------------------------------- Justin Wojdacki justin@chiplogic.com (408) 350-5032 Communications Processors Group -- Analog Devices To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hackers" in the body of the message