From owner-freebsd-arm@freebsd.org Thu Jan 26 20:53:36 2017 Return-Path: Delivered-To: freebsd-arm@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 5B382CC13E5 for ; Thu, 26 Jan 2017 20:53:36 +0000 (UTC) (envelope-from tony@tndh.net) Received: from express.tndh.net (express.tndh.net [IPv6:2001:470:e930:1240:20d:56ff:fe04:4c0a]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 36960144D; Thu, 26 Jan 2017 20:53:36 +0000 (UTC) (envelope-from tony@tndh.net) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=tndh.net; s=dkim; h=Subject:Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:In-Reply-To:References:To:From; bh=5v1NaExdic24PHueCa2L4oXGF7JHvgiSp+kiJCtjGxg=; b=AKpiwNmA1LfwIhgLQjAkaCNZ3qTIddzirrvaJk3IEy08D0yEYGbr04Ka4jIbYCwVgXFppGo3UnJdErRx6bEDzrWBMIxusu2lav949SMeL8VhjEH18mtJFffyGhgxqOWSpZXfOeM56P/0TYPrbttsUjg8pTjUG1pA0gzkvGj8m2rJ7nhL; Received: from express.tndh.net ([2001:470:e930:1240:20d:56ff:fe04:4c0a] helo=eaglet) by express.tndh.net with esmtp (Exim 4.72 (FreeBSD)) (envelope-from ) id 1cWr2v-0009wm-Bw; Thu, 26 Jan 2017 12:53:35 -0800 From: "Tony Hain" To: "'Ian Lepore'" , References: <03a801d2776e$cae997e0$60bcc7a0$@tndh.net> <1485400906.30533.54.camel@freebsd.org> <03bb01d2779d$45d6edd0$d184c970$@tndh.net> <03c101d277ae$70f142c0$52d3c840$@tndh.net> <1485445768.30533.68.camel@freebsd.org> In-Reply-To: <1485445768.30533.68.camel@freebsd.org> Date: Thu, 26 Jan 2017 12:53:29 -0800 Message-ID: <040101d27816$3f7547b0$be5fd710$@tndh.net> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 14.0 Thread-Index: AQEImxvIZ6VEPYS1CTeMHuF4SjTdHgFGeuiPAfagOS8BXCmlWAJOLTryoqeN/5A= Content-Language: en-us X-SA-Exim-Connect-IP: 2001:470:e930:1240:20d:56ff:fe04:4c0a X-SA-Exim-Mail-From: tony@tndh.net X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on express.tndh.net X-Spam-Level: X-Spam-Status: No, score=-4.2 required=4.5 tests=ALL_TRUSTED,RP_MATCHES_RCVD autolearn=unavailable version=3.3.1 Subject: RE: BBB uarts & pps dts definitions X-SA-Exim-Version: 4.2 X-SA-Exim-Scanned: Yes (on express.tndh.net) X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 26 Jan 2017 20:53:36 -0000 Ian Lepore wrote: >>>>>>>> snip > > > > > > Even when it gets built though, the scope shows that the signal is > > > being pulled to ground as soon as the wire is connected to P8-7, = so > > > I don't > > expect it > > > > > > to work. Is there a way to check the state of the gpio? I would > > > expect something like # gpioctl -N gpio_66 Can't find pin named > > > "gpio_66" > > > > > > # gpioctl -l > > > pin 00: 0=A0=A0=A0=A0=A0=A0=A0gpio_0<> > > > pin 01: 0=A0=A0=A0=A0=A0=A0=A0gpio_1<> > > > ... > > > pin 30: 1=A0=A0=A0=A0=A0=A0=A0gpio_30 > > > pin 31: 1=A0=A0=A0=A0=A0=A0=A0gpio_31 > > > # > > > > > > How do the 3 additional pinmux controllers get enabled? > > > > > > > > > > > > > > =A0 ./ppsapitest /dev/dmtpps > > > > > > > > You should get something like: > > > > > > > > =A0 1485400775 .009578536 204 0 .000000000 0 > > > > =A0 1485400776 .009621995 205 0 .000000000 0 > > > > =A0 1485400777 .009665453 206 0 .000000000 0 > > > > =A0 1485400778 .009708869 207 0 .000000000 0 > > > > > > > > -- Ian > > > >=20 > Everything I'm doing is with 12-current, but things shouldn't be very different > in 11-stable. >=20 > Pin P8-7 is pin 2 on controller 2, so >=20 > =A0 gpioctl -f /dev/gpcio2 -l >=20 > when it's configured correctly it should look like: >=20 > =A0 pin 02: 0=A0=A0=A0=A0=A0=A0=A0gpio_2<> # gpioctl -lv -f /dev/gpioc2 pin 00: 1 gpio_0, caps: pin 01: 0 gpio_1, caps: pin 02: 0 gpio_2<>, caps: ... So it looks like gpioctl defaults to the first controller if none are listed, since gpioctl -lv only shows the first 32. Nothing in gpioctl = -h indicates that would be the case, though the framework wiki does mention = a restriction at 32 in the hint files discussion. Nothing in -h, the man = page, or the wiki indicates what -t -c or -n do, so I am reluctant to try = them. I would guess toggle, capabilities, and name, but the help and = documentation should really be clear about that, and how to set direction. >=20 > If you do a verbose boot (in loader, at the prompt do boot -v) do you = see > these two lines right before the=A0am335x_dmtimer0: line? >=20 > =A0 ti_pinmux0: setting internal 2a for timer4 > =A0 am335x_dmtpps: configured pin P8-7 as input for timer4 Booting from disk0s2a: /boot/kernel/kernel data=3D0x6d6564+0x145a9c = syms=3D[0x4+0x7eb30+0x4+0x922fa] /boot/kernel/am335x_dmtpps.ko text=3D0x1c60 data=3D0x224+0x8 syms=3D[0x4+0x820+0x4+0x742] loader> boot -v # dmesg | grep er4 ti_pinmux0: setting internal 2a for timer4 am335x_dmtpps: configured pin P8-7 as input for timer4 am335x_dmtpps0: mem 0x48044000-0x480443ff = irq 30 on simplebus0 Timecounter "DMTimer4" frequency 24000000 Hz quality 1000 am335x_dmtpps0: Using DMTimer4 for PPS device /dev/dmtpps So all that looks as you indicated it should, though I am troubled that = pin 2 is not restricted to IN on the gpioctl listing. It does say configured = as input in dmesg, so it should be doing the right thing.=20 The only thing that comes to mind at this point is some electrical restriction about the BBB input, where a 5/3 resistive divider = (2.2k/3.3k) is inadequate, but the fact that the uart is working would tend to rule = that out. Electrically it is acting as though the pin is set to Output at 0. ...... As I typed that it occurred to me I should really check that it = is 0, and found that there actually is a correct pulse at 60mv. This would = imply that the input impedance of the pin is 26 ohms. The system reference = manual doesn't discuss input impedance that I can find, and search isn't = turning up anything either. Why would the timer pin be different than the uart pin = on the same soc? What are you using to drive your pps? This is so close, there must be something really trivial that I am overlooking... Tony