From owner-freebsd-hackers Sun Nov 30 12:30:30 1997 Return-Path: Received: (from root@localhost) by hub.freebsd.org (8.8.7/8.8.7) id MAA02424 for hackers-outgoing; Sun, 30 Nov 1997 12:30:30 -0800 (PST) (envelope-from owner-freebsd-hackers) Received: from hydrogen.nike.efn.org (resnet.uoregon.edu [128.223.170.28]) by hub.freebsd.org (8.8.7/8.8.7) with ESMTP id MAA02418 for ; Sun, 30 Nov 1997 12:30:22 -0800 (PST) (envelope-from gurney_j@efn.org) Received: (from jmg@localhost) by hydrogen.nike.efn.org (8.8.7/8.8.7) id MAA03137; Sun, 30 Nov 1997 12:30:16 -0800 (PST) Message-ID: <19971130123015.27690@hydrogen.nike.efn.org> Date: Sun, 30 Nov 1997 12:30:15 -0800 From: John-Mark Gurney To: John Kelly Cc: hackers@FreeBSD.ORG Subject: Re: 650 UART, SIO driver, 8259 PIC References: <199711292017.HAA16179@godzilla.zeta.org.au> <348095b5.441871@mail.cetlink.net> <19971130002133.00410@hydrogen.nike.efn.org> <3482bd16.18797696@mail.cetlink.net> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-Mailer: Mutt 0.69 In-Reply-To: <3482bd16.18797696@mail.cetlink.net>; from John Kelly on Sun, Nov 30, 1997 at 08:03:33PM +0000 Reply-To: John-Mark Gurney Organization: Cu Networking X-Operating-System: FreeBSD 2.2.1-RELEASE i386 X-PGP-Fingerprint: B7 EC EF F8 AE ED A7 31 96 7A 22 B3 D8 56 36 F4 X-Files: The truth is out there X-URL: http://resnet.uoregon.edu/~gurney_j/ Sender: owner-freebsd-hackers@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk John Kelly scribbled this message on Nov 30: > On Sun, 30 Nov 1997 00:21:33 -0800, John-Mark Gurney > wrote: > > >I've thought about upgrading sio so that it would understand the > >existance of it, but there were a number of problems... the status > >register is stored in the scratch register of the fourth port of the > >board... also, on the AST/4 the port to write to, to clear ALL the > >interrupts > > When you say "to clear ALL the interrupts," are you talking about an > AST-style control register? My board only has a status register, so I > don't understand the notion of clearing interrupts by writing to a > port. Can you explain the use of an AST-style control register? yes... the board that I have is an AST/4 compatible board... and the Shared Interrupt Clear Register (sicr) is used to clear the interrupt when you have more than one board sitting on the interrupt (these boards are documented to work if both 4port boards are on the same interrupts).. this will force both boards to ground out, and then the interrupt controller will be able to see the next edge... also, the port you write to is suppose to be determined by the irq that the boards are on, but the boards I have will listen to all the ports and clear the interrupt if you have the boards configured to share interrupts.. then they also have the status register that your familar with.. a simple register that sets the bit of the ports that have an interrupt pending... this is mapped to the scratch register of the fourth port... -- John-Mark Gurney Modem/FAX: +1 541 683 6954 Cu Networking Live in Peace, destroy Micro$oft, support free software, run FreeBSD