From owner-freebsd-usb@FreeBSD.ORG Tue Dec 18 19:47:42 2012 Return-Path: Delivered-To: freebsd-usb@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 55A291B5; Tue, 18 Dec 2012 19:47:42 +0000 (UTC) (envelope-from hselasky@c2i.net) Received: from swip.net (mailfe09.c2i.net [212.247.155.2]) by mx1.freebsd.org (Postfix) with ESMTP id A959A8FC0A; Tue, 18 Dec 2012 19:47:41 +0000 (UTC) X-T2-Spam-Status: No, hits=-0.2 required=5.0 tests=ALL_TRUSTED, BAYES_50 Received: from [176.74.213.204] (account mc467741@c2i.net HELO laptop015.hselasky.homeunix.org) by mailfe09.swip.net (CommuniGate Pro SMTP 5.4.4) with ESMTPA id 185763534; Tue, 18 Dec 2012 20:42:33 +0100 From: Hans Petter Selasky To: Andrew Turner Subject: Re: EHCI on armv6 with Write-Back caches Date: Tue, 18 Dec 2012 20:44:11 +0100 User-Agent: KMail/1.13.7 (FreeBSD/9.1-PRERELEASE; KDE/4.8.4; amd64; ; ) References: <20121218204931.5322922d@fubar.geek.nz> <201212181306.44926.hselasky@c2i.net> <20121219081229.383d9f41@fubar.geek.nz> In-Reply-To: <20121219081229.383d9f41@fubar.geek.nz> X-Face: 'mmZ:T{)),Oru^0c+/}w'`gU1$ubmG?lp!=R4Wy\ELYo2)@'UZ24N@d2+AyewRX}mAm; Yp |U[@, _z/([?1bCfM{_"B<.J>mICJCHAzzGHI{y7{%JVz%R~yJHIji`y>Y}k1C4TfysrsUI -%GU9V5]iUZF&nRn9mJ'?&>O MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Message-Id: <201212182044.11326.hselasky@c2i.net> Cc: Oleksandr Tymoshenko , freebsd-usb@freebsd.org X-BeenThere: freebsd-usb@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: FreeBSD support for USB List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 18 Dec 2012 19:47:42 -0000 On Tuesday 18 December 2012 20:12:29 Andrew Turner wrote: > On Tue, 18 Dec 2012 13:06:44 +0100 > > Hans Petter Selasky wrote: > > Hi Andrew, > > > > > The BUS_DMA_COHERENT flag does nothing on armv6 as we need the cache > > > enabled for atomic operations to work correctly and we would have to > > > disable the cache on the entire page. This is acceptable behaviour > > > from the description of the flag in the busdma man page. > > > > Yes, but when I allocate memory from the USB stack, then I want that > > memory to not be cached. It is simply not that useful to have that > > memory cached. I didn't check the latest state of busdma, but if I'm > > not mistaken, if the BUS_DMA_COHERENT flag is set on the DMA tag, the > > flush/invalidate will simply return and do nothing. Maybe that is the > > problem ... > > The exact meaning of BUS_DMA_COHERENT depends on the architecture. The > code is still required to call bus_dmamap_sync with a coherent map but > when the flag is implemented the cost of the operation will be reduced. > It doesn't guarantee the memory is uncached, it may be implemented that > way but the USB code can't rely on it. > > Andrew The USB code doesn't rely on this flag. I'm wondering if BUSDMA by accident sets this flag, so that the cache sync ops are not called. --HPS