Skip site navigation (1)Skip section navigation (2)
Date:      Tue, 18 Oct 2011 02:46:26 +0000 (UTC)
From:      Adrian Chadd <adrian@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r226487 - head/sys/dev/ath/ath_hal
Message-ID:  <201110180246.p9I2kQla052455@svn.freebsd.org>

next in thread | raw e-mail | index | archive | help
Author: adrian
Date: Tue Oct 18 02:46:26 2011
New Revision: 226487
URL: http://svn.freebsd.org/changeset/base/226487

Log:
  Add in OS_REG_BIT_SET, a macro which does what it says it does.
  
  This will be used in an upcoming commit to the ar5212 HAL.

Modified:
  head/sys/dev/ath/ath_hal/ah_internal.h

Modified: head/sys/dev/ath/ath_hal/ah_internal.h
==============================================================================
--- head/sys/dev/ath/ath_hal/ah_internal.h	Tue Oct 18 02:43:59 2011	(r226486)
+++ head/sys/dev/ath/ath_hal/ah_internal.h	Tue Oct 18 02:46:26 2011	(r226487)
@@ -472,6 +472,8 @@ isBigEndian(void)
 	OS_REG_WRITE(_a, _r, OS_REG_READ(_a, _r) | (_f))
 #define	OS_REG_CLR_BIT(_a, _r, _f) \
 	OS_REG_WRITE(_a, _r, OS_REG_READ(_a, _r) &~ (_f))
+#define OS_REG_IS_BIT_SET(_a, _r, _f) \
+	    ((OS_REG_READ(_a, _r) & (_f)) != 0)
 
 /* Analog register writes may require a delay between each one (eg Merlin?) */
 #define	OS_A_REG_RMW_FIELD(_a, _r, _f, _v) \



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?201110180246.p9I2kQla052455>