From owner-freebsd-current@freebsd.org Fri Feb 24 17:57:31 2017 Return-Path: Delivered-To: freebsd-current@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id F0B04CEBA53 for ; Fri, 24 Feb 2017 17:57:31 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from mail.baldwin.cx (bigwig.baldwin.cx [IPv6:2001:470:1f11:75::1]) (using TLSv1 with cipher DHE-RSA-CAMELLIA256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id CD99FBA2; Fri, 24 Feb 2017 17:57:31 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from ralph.baldwin.cx (c-73-231-226-104.hsd1.ca.comcast.net [73.231.226.104]) by mail.baldwin.cx (Postfix) with ESMTPSA id 7A16110A7DB; Fri, 24 Feb 2017 12:57:30 -0500 (EST) From: John Baldwin To: Jia-Shiun Li Cc: Konstantin Belousov , freebsd-current , Konstantin Belousov Subject: Re: TSC as timecounter makes system lag Date: Fri, 24 Feb 2017 09:44:19 -0800 Message-ID: <4834290.Ch45mPOc5h@ralph.baldwin.cx> User-Agent: KMail/4.14.10 (FreeBSD/11.0-STABLE; KDE/4.14.10; amd64; ; ) In-Reply-To: References: <20170113120534.GC2349@kib.kiev.ua> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.4.3 (mail.baldwin.cx); Fri, 24 Feb 2017 12:57:30 -0500 (EST) X-Virus-Scanned: clamav-milter 0.99.2 at mail.baldwin.cx X-Virus-Status: Clean X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 24 Feb 2017 17:57:32 -0000 On Friday, February 24, 2017 10:50:19 PM Jia-Shiun Li wrote: > On Fri, Feb 24, 2017 at 9:32 PM, Jia-Shiun Li wrote: > > > On Fri, Feb 24, 2017 at 7:45 PM, Konstantin Belousov > > wrote: > > > >> On Fri, Feb 24, 2017 at 12:15:26PM +0800, Jia-Shiun Li wrote: > >> > Tested working on E7400 against r313909. And changing timecounter > >> from/to > >> > TSC > >> > correctly enables/disables C2. > >> > > >> > The latter part cpu_disable_c2_sleep++ is not needed. When > >> > init_TSC_tc() got called timecounter is not yet tsc_timecounter. > >> > inittimecounter() later will do the work calling tc_windup(). > >> > > >> > >> You mean, just this > >> - if (cpu_deepest_sleep >= 2 && cpu_vendor_id == CPU_VENDOR_INTEL && > >> + if (cpu_vendor_id == CPU_VENDOR_INTEL && > >> is enough to fix the issue ? If yes, we can remove the cpu_deepest_sleep > >> variable. This is John' observation, I think he would prefer to prepare > >> the patch. > >> > > > > Correct. That's enough. > > > > > Since that's simple enough... patch attached. > Tested against r313909 too. Thanks for tracking down the cause and the patch! -- John Baldwin