From owner-freebsd-embedded@FreeBSD.ORG Fri Jan 9 17:07:43 2015 Return-Path: Delivered-To: freebsd-embedded@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 261378E0 for ; Fri, 9 Jan 2015 17:07:43 +0000 (UTC) Received: from mail-la0-f45.google.com (mail-la0-f45.google.com [209.85.215.45]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 90B5EFC0 for ; Fri, 9 Jan 2015 17:07:42 +0000 (UTC) Received: by mail-la0-f45.google.com with SMTP id gq15so15585914lab.4 for ; Fri, 09 Jan 2015 09:07:40 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:date :message-id:subject:from:to:cc:content-type; bh=tbW06j24Msk/hqcMjVgSIBtrUMnpecH0Uq5ubK2zwsw=; b=XEXfrm1ZiRY9VgftzrD7GB3UnOk5shcGXywfY1+z6GunTSCUG7yCW5VBZHAqYlUitp whmIDq6hj2sisnJEzOrFXMXvgV3OjRcpNmIE5fmwHLXxJW6W2UutCxak5uuO7XUyAG4c ol89ScokjtHGbFqQ3vXjoDCbmIasX50qgO+PQCMjkkrtLJhnf3q+Vp/l4WeoKWOCj6sw hh6VbhbO6S6vwLLAJdMf0J2t7ML1CmuLFHh/4lCAr3MN41FwtC+EE8PEfwt7gLUspHHn jYZX1e+H/Z4lAmTAnO1X3dSlj3o5M5LnVnQDXIHA17ASpqPx5WpK1Ss9H/7wwyN+6kGH NJeg== X-Gm-Message-State: ALoCoQkPGnLwrhOAXMskQDzW7STy0BgcunQt6sjUCAa/OH46eOCJB4GTrX++jrLhuNFOC2cqkLud MIME-Version: 1.0 X-Received: by 10.112.24.130 with SMTP id u2mr22471245lbf.57.1420823259891; Fri, 09 Jan 2015 09:07:39 -0800 (PST) Received: by 10.25.14.208 with HTTP; Fri, 9 Jan 2015 09:07:39 -0800 (PST) In-Reply-To: <20150108203959.GR42409@kib.kiev.ua> References: <20150108203959.GR42409@kib.kiev.ua> Date: Fri, 9 Jan 2015 18:07:39 +0100 Message-ID: Subject: Re: [PATCH] Add support for 64-bit AHCI BAR. From: =?UTF-8?Q?Micha=C5=82_Stanek?= To: Konstantin Belousov Content-Type: multipart/mixed; boundary=001a1134babcb1f795050c3b31f1 X-Content-Filtered-By: Mailman/MimeDel 2.1.18-1 Cc: freebsd-current@freebsd.org, freebsd-embedded@freebsd.org X-BeenThere: freebsd-embedded@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Dedicated and Embedded Systems List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 09 Jan 2015 17:07:43 -0000 --001a1134babcb1f795050c3b31f1 Content-Type: text/plain; charset=UTF-8 2015-01-08 21:40 GMT+01:00 Konstantin Belousov : > > However, if > > AHCI uses 64-bit base addresses, then this register consists of two > dwords > > starting at offset 0x20 - BAR4 and BAR5. This is the case on our arm64 > > target and possibly other platforms using 64-bit BARs for AHCI. > Is it specified anywhere, or just a quirk of the specific implementation ? > If it is a quirk, would it make sense to also check the vendor or device > id before applying the logic ? > > Yes, indeed it is a quirk as I just found out that our platform vendor actually uses BAR(0) as AHCI ABAR, while BAR(4) is used for something else. I found it implemented as a quirk in Linux AHCI code. The BAR is still 64-bit but in a different position than AHCI spec stated. I changed it as you suggested, the new patch is in the attachment. Please take a look. > > > The following patch adds a check for the extended BAR in > ahci_pci_attach() > > and sets the 'rid' in bus_alloc_resource_any accordingly. It fixes the > > allocation error on our platform. > > > > Please review and test this patch on other platforms. If there are no > > issues then it will be committed in a week. > > > --001a1134babcb1f795050c3b31f1 Content-Type: text/x-patch; charset=US-ASCII; name="0001-Add-quirk-for-Cavium-AHCI-BAR-location.patch" Content-Disposition: attachment; filename="0001-Add-quirk-for-Cavium-AHCI-BAR-location.patch" Content-Transfer-Encoding: base64 X-Attachment-Id: f_i4pt4emp0 RnJvbSBiNjIyMDg4NGQ5ZTcxZDdjNGZjMWMyYTIyYWRlMzc0ZmMwMjNjODMxIE1vbiBTZXAgMTcg MDA6MDA6MDAgMjAwMQpGcm9tOiBNaWNoYWwgU3RhbmVrIDxtc3RAc2VtaWhhbGYuY29tPgpEYXRl OiBGcmksIDkgSmFuIDIwMTUgMTc6MjA6MzggKzAxMDAKU3ViamVjdDogW1BBVENIXSBBZGQgcXVp cmsgZm9yIENhdml1bSBBSENJIEJBUiBsb2NhdGlvbgoKLS0tCiBzeXMvZGV2L2FoY2kvYWhjaV9w Y2kuYyB8IDkgKysrLS0tLS0tCiAxIGZpbGUgY2hhbmdlZCwgMyBpbnNlcnRpb25zKCspLCA2IGRl bGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL3N5cy9kZXYvYWhjaS9haGNpX3BjaS5jIGIvc3lzL2Rl di9haGNpL2FoY2lfcGNpLmMKaW5kZXggNDM3MjNhNi4uZGNlNGFjYiAxMDA2NDQKLS0tIGEvc3lz L2Rldi9haGNpL2FoY2lfcGNpLmMKKysrIGIvc3lzL2Rldi9haGNpL2FoY2lfcGNpLmMKQEAgLTM3 Myw3ICszNzMsNiBAQCBhaGNpX3BjaV9hdHRhY2goZGV2aWNlX3QgZGV2KQogCWludAllcnJvciwg aTsKIAl1aW50MzJfdCBkZXZpZCA9IHBjaV9nZXRfZGV2aWQoZGV2KTsKIAl1aW50OF90IHJldmlk ID0gcGNpX2dldF9yZXZpZChkZXYpOwotCXN0cnVjdCBwY2lfbWFwICptYXA7CiAKIAlpID0gMDsK IAl3aGlsZSAoYWhjaV9pZHNbaV0uaWQgIT0gMCAmJgpAQCAtMzkyLDExICszOTEsOSBAQCBhaGNp X3BjaV9hdHRhY2goZGV2aWNlX3QgZGV2KQogCWN0bHItPnN1YnZlbmRvcmlkID0gcGNpX2dldF9z dWJ2ZW5kb3IoZGV2KTsKIAljdGxyLT5zdWJkZXZpY2VpZCA9IHBjaV9nZXRfc3ViZGV2aWNlKGRl dik7CiAKLQkvKiBBSENJIEJhc2UgQWRkcmVzcyBpcyBCQVIoNSkgYnkgZGVmYXVsdCwgdW5sZXNz IEJBUnMgYXJlIDY0LWJpdCAqLwotCW1hcCA9IHBjaV9maW5kX2JhcihkZXYsIFBDSVJfQkFSKDQp KTsKLQlpZiAobWFwICE9IE5VTEwgJiYKLQkgICAgKChtYXAtPnBtX3ZhbHVlICYgUENJTV9CQVJf TUVNX1RZUEUpID09IFBDSU1fQkFSX01FTV82NCkpCi0JCWN0bHItPnJfcmlkID0gUENJUl9CQVIo NCk7CisJLyogRGVmYXVsdCBBSENJIEJhc2UgQWRkcmVzcyBpcyBCQVIoNSksIENhdml1bSB1c2Vz IEJBUigwKSAqLworCWlmIChjdGxyLT52ZW5kb3JpZCA9PSAweDE3N2QgJiYgY3Rsci0+ZGV2aWNl aWQgPT0gMHhhMDFjKQorCQljdGxyLT5yX3JpZCA9IFBDSVJfQkFSKDApOwogCWVsc2UKIAkJY3Rs ci0+cl9yaWQgPSBQQ0lSX0JBUig1KTsKIAlpZiAoIShjdGxyLT5yX21lbSA9IGJ1c19hbGxvY19y ZXNvdXJjZV9hbnkoZGV2LCBTWVNfUkVTX01FTU9SWSwKLS0gCjIuMi4xCgo= --001a1134babcb1f795050c3b31f1--