From owner-cvs-src-old@FreeBSD.ORG Thu Dec 24 17:22:37 2009 Return-Path: Delivered-To: cvs-src-old@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 921F81065692 for ; Thu, 24 Dec 2009 17:22:37 +0000 (UTC) (envelope-from yongari@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 8056C8FC16 for ; Thu, 24 Dec 2009 17:22:37 +0000 (UTC) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id nBOHMbvI036265 for ; Thu, 24 Dec 2009 17:22:37 GMT (envelope-from yongari@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id nBOHMbQI036264 for cvs-src-old@freebsd.org; Thu, 24 Dec 2009 17:22:37 GMT (envelope-from yongari@repoman.freebsd.org) Message-Id: <200912241722.nBOHMbQI036264@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to yongari@repoman.freebsd.org using -f From: Pyun YongHyeon Date: Thu, 24 Dec 2009 17:22:15 +0000 (UTC) To: cvs-src-old@freebsd.org X-FreeBSD-CVS-Branch: HEAD Subject: cvs commit: src/sys/dev/ste if_ste.c if_stereg.h X-BeenThere: cvs-src-old@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: **OBSOLETE** CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 24 Dec 2009 17:22:37 -0000 yongari 2009-12-24 17:22:15 UTC FreeBSD src repository Modified files: sys/dev/ste if_ste.c if_stereg.h Log: SVN rev 200950 on 2009-12-24 17:22:15Z by yongari Implement RX interrupt moderation using one-shot timer interrupt. Unlike TX interrupt, ST201 does not provide any mechanism to suppress RX interrupts. ste(4) can generate more than 70k RX interrupts under heavy RX traffics such that these excessive interrupts make system useless to process other useful things. Maybe this was the major reason why polling support code was introduced to ste(4). The STE_COUNTDOWN register provides a programmable counter that will generate an interrupt upon its expiration. We program STE_DMACTL register to use 3.2us clock rate to drive the counter register. Whenever ste(4) serves RX interrupt, the driver rearm the timer to expire after STE_IM_RX_TIMER_DEFAULT time and disables further generation of RX interrupts. This trick seems to work well and ste(4) generates less than 8k RX interrupts even under 64 bytes UDP torture test. Combined with TX interrupts, the total number of interrupts are less than 10k which looks reasonable on heavily loaded controller. The default RX interrupt moderation time is 150us. Users can change the value at any time with dev.ste.%d.int_rx_mod sysctl node. Setting it 0 effectively disables the RX interrupt moderation feature. Now we have both TX/RX interrupt moderation code so remove loop of interrupt handler which resulted in sub-optimal performance as well as more register accesses. Revision Changes Path 1.26 +63 -26 src/sys/dev/ste/if_ste.c 1.15 +11 -1 src/sys/dev/ste/if_stereg.h