Date: Fri, 8 Jan 2010 14:54:37 -0700 From: kimble <kimble@spmpx220.com> To: Craig Butler <craig001@lerwick.hopto.org> Cc: freebsd-sparc64@freebsd.org Subject: Re: Sun Netra X1 -- LOM: errors after clearing ram, etc. Message-ID: <BAAD6C10-7C8B-447F-99DE-86ECB3D5EFF8@spmpx220.com> In-Reply-To: <4B47A7A7.9060503@lerwick.hopto.org> References: <e44854981001070621h402b334x942638f52273829e@mail.gmail.com> <4B47A7A7.9060503@lerwick.hopto.org>
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try putting some PC133 ECC/Registered memory in it... the X1 doesnt like = NON-ECC/non registered ram . On Jan 8, 2010, at 2:46 PM, Craig Butler wrote: > On 07/01/2010 14:21, Zach Wendell wrote: >> Anyone have any ideas about the LOM output below? Just keeps spitting = out >> the same thing over and over... >>=20 >> Currently there are no drives installed (waiting for a coworker to = bring in >> an extra HDD and CD-ROM drive so we can install BSD), but there is a = stick >> of non-ECC PC133, 128MB ram installed. >>=20 >> I have 3 sticks of non-ECC PC133, and one stick of non-ECC PC100 ram, = all >> 128MB. 2 of them immediately throw a "no memory installed, will not = proceed" >> error -- obviously those are bad (or most likely). The other 2 do = what >> you'll see below... So far, I've only tried one stick at a time, to = rule out >> bad combos, etc. >>=20 >> Thanks in advance! >> ~zmw >>=20 >>=20 >>=20 >>=20 >>=20 >> lom> >> LOM event: +0h31m28s host power on >> ` >> Processor Speed =3D [Speed Jumper =3D 7] 400 MHz Baud rate is 9600 >> 8 Data bits, 1 stop bits, no parity (configured from lom) >>=20 >> Firmware CORE Sun Microsystems, Inc. >> @(#) core 1.0.1 2001/02/19 09:55 >> Hardware Power ON >> Verifying NVRAM...Done >> Bootmode is 0 >> MCR0 =3D 36a0b004 >> MCR1 =3D c0804000 >> MCR2 =3D f110006 >> MCR3 =3D 6 >> Ecache Size =3D 256 KB >> NVRAM Test >> Icache Test >> Dcache Test >> MMU Test >> Ecache Tag Addr Test >> Ecache RAM Addr Test >> Clearing E$ Tags Done >> Clearing I/D TLBs Done >> Probing memory >> Done >> MEMBASE=3D0x0 >> MEMSIZE=3D0x8000000 >> Data Line Test >> Core Memory Test >>=20 >> Processor Speed =3D 400 MHz >> Baud rate is 9600 >> 8 Data bits, 1 stop bits, no parity (configured from lom) >>=20 >> Firmware CORE Sun Microsystems, Inc. >> @(#) core 1.0.1 2001/02/19 09:55 >> Software Power ON >> Verifying NVRAM...Done >> Bootmode is 0 >> MCR0 =3D 36a0b004 >> MCR1 =3D c0804000 >> MCR2 =3D f110006 >> MCR3 =3D 6 >> Ecache Size =3D 256 KB >> Clearing E$ Tags Done >> Clearing I/D TLBs Done >> Probing memory >> Done >> MEMBASE=3D0x0 >> MEMSIZE=3D0x8000000 >> Clearing memory...Done >> Turing ON MMUs Done >> Copy ROM to RAM (148440 bytes) Done >> Orig PC=3D0x1fff0007efc New PC=3D0xf0f07f54 >>=20 >> ****************************** >> **************** >> PSTATE=3D0000000000000015 TBA=3D00000000f0f00000 DCU >> Control=3D0000000000000000 >> AFSR=3D0000000000000000 AFAR=3Dffffffffffffffb8 = PIL=3D000000000000000f >> I-SFSR=3D00000000000010a2 D-SFSR=3D000000000004002b = D-SFAR=3D00000000000007ff >> TL=3D0005 TT=3D00c0 TPC=3D00000000f0f0b3f0 = TNPC=3D00000000f0f0b3f4 >> TL=3D0004 TT=3D0034 TPC=3D00000000f0f05800 = TNPC=3D00000000f0f05804 >> TL=3D0003 TT=3D00c0 TPC=3D00000000f0f0b3f0 = TNPC=3D00000000f0f0b3f4 >> TL=3D0002 TT=3D0010 TPC=3D00000000f0f0b3f4 = TNPC=3D00000000f0f0b3f8 >> TL=3D0001 TT=3D0010 TPC=3D00000000f0f0a42c = TNPC=3D00000000f0f0a430 >> ********************************************** >>=20 >> ********************************************** >> PSTATE=3D0000000000000015 TBA=3D00000000f0000000 DCU >> Control=3D0000000000000000 >> AFSR=3D0000000000000000 AFAR=3Dffffffffffffffb8 = PIL=3D000000000000000f >> I-SFSR=3D00000000000010a2 D-SFSR=3D000000000004002b = D-SFAR=3D00000000000007ff >> TL=3D0005 TT=3D0010 TPC=3D00000000f0004200 = TNPC=3D00000000f0004204 >> TL=3D0004 TT=3D0010 TPC=3D00000000f0004200 = TNPC=3D00000000f0004204 >> TL=3D0003 TT=3D0010 TPC=3D00000000f0004200 = TNPC=3D00000000f0004204 >> TL=3D0002 TT=3D0010 TPC=3D00000000f0000204 = TNPC=3D0000000114800200 >> TL=3D0001 TT=3D0010 TPC=3D00000000f0003a04 = TNPC=3D00000000f0003a08 >> ********************************************** >>=20 >> ********************************************** >> PSTATE=3D0000000000000015 TBA=3D00000000f0000000 DCU >> Control=3D0000000000000000 >> AFSR=3D0000000000000000 AFAR=3Dffffffffffffffb8 = PIL=3D000000000000000f >> I-SFSR=3D00000000000010a2 D-SFSR=3D000000000004002b = D-SFAR=3D00000000000007ff >> TL=3D0005 TT=3D0010 TPC=3D00000000f0004200 = TNPC=3D00000000f0004204 >> TL=3D0004 TT=3D0010 TPC=3D00000000f0004200 = TNPC=3D00000000f0004204 >> TL=3D0003 TT=3D0010 TPC=3D00000000f0004200 = TNPC=3D00000000f0004204 >> TL=3D0002 TT=3D0010 TPC=3D00000000f0000204 = TNPC=3D0000000114800200 >> TL=3D0001 TT=3D0010 TPC=3D00000000f0003a04 = TNPC=3D00000000f0003a08 >> ********************************************** >>=20 >> ********************************************** >> PSTATE=3D0000000000000015 TBA=3D00000000f0000000 DCU >> Control=3D0000000000000000 >> AFSR=3D0000000000000000 AFAR=3Dffffffffffffffb8 = PIL=3D000000000000000f >> I-SFSR=3D00000000000010a2 D-SFSR=3D000000000004002b = D-SFAR=3D00000000000007ff >> TL=3D0005 TT=3D0010 TPC=3D00000000f0004200 = TNPC=3D00000000f0004204 >> TL=3D0004 TT=3D0010 TPC=3D00000000f0004200 = TNPC=3D00000000f0004204 >> TL=3D0003 TT=3D0010 TPC=3D00000000f0004200 = TNPC=3D00000000f0004204 >> TL=3D0002 TT=3D0010 TPC=3D00000000f0000204 = TNPC=3D0000000114800200 >> TL=3D0001 TT=3D0010 TPC=3D00000000f0003a04 = TNPC=3D00000000f0003a08 >> ********************************************** >>=20 >> ********************************************** >> PSTATE=3D0000000000000015 TBA=3D00000000f0000000 DCU >> Control=3D0000000000000000 >> AFSR=3D0000000000000000 AFAR=3Dffffffffffffffb8 = PIL=3D000000000000000f >> I-SFSR=3D00000000000010a2 D-SFSR=3D000000000004002b = D-SFAR=3D00000000000007ff >> TL=3D0005 TT=3D0010 TPC=3D00000000f0004200 = TNPC=3D00000000f0004204 >> TL=3D0004 TT=3D0010 TPC=3D00000000f0004200 = TNPC=3D00000000f0004204 >> TL=3D0003 TT=3D0010 TPC=3D00000000f0004200 = TNPC=3D00000000f0004204 >> TL=3D0002 TT=3D0010 TPC=3D00000000f0000204 = TNPC=3D0000000114800200 >> TL=3D0001 TT=3D0010 TPC=3D00000000f0003a04 = TNPC=3D00000000f0003a08 >> ********************************************** >>=20 >> ********************************************** >> PSTATE=3D0000000000000015 TBA=3D00000000f0000000 DCU >> Control=3D0000000000000000 >> AFSR=3D0000000000000000 AFAR=3Dffffffffffffffb8 = PIL=3D000000000000000f >> I-SFSR=3D00000000000010a2 D-SFSR=3D000000000004002b = D-SFAR=3D00000000000007ff >> TL=3D0005 TT=3D0010 TPC=3D00000000f0004200 = TNPC=3D00000000f0004204 >> TL=3D0| >> lom> >> LOM event: +0h33m5s host power off >> lom> >> _______________________________________________ >> freebsd-sparc64@freebsd.org mailing list >> http://lists.freebsd.org/mailman/listinfo/freebsd-sparc64 >> To unsubscribe, send any mail to = "freebsd-sparc64-unsubscribe@freebsd.org" >> =20 > I've seen the same on mine... turned out to be bad memory... It = doesn't like mixed speeds and I think they got to be in matched pairs... > I could be wrong tho ! >=20 > Cheers >=20 > Craig B >=20 >=20 > _______________________________________________ > freebsd-sparc64@freebsd.org mailing list > http://lists.freebsd.org/mailman/listinfo/freebsd-sparc64 > To unsubscribe, send any mail to = "freebsd-sparc64-unsubscribe@freebsd.org"
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