From owner-svn-src-head@FreeBSD.ORG Sun Mar 8 03:34:07 2015 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 9CF4050D; Sun, 8 Mar 2015 03:34:07 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 88AEEFC6; Sun, 8 Mar 2015 03:34:07 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t283Y7Oc052864; Sun, 8 Mar 2015 03:34:07 GMT (envelope-from ian@FreeBSD.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t283Y7Do052863; Sun, 8 Mar 2015 03:34:07 GMT (envelope-from ian@FreeBSD.org) Message-Id: <201503080334.t283Y7Do052863@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: ian set sender to ian@FreeBSD.org using -f From: Ian Lepore Date: Sun, 8 Mar 2015 03:34:07 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r279766 - head/sys/arm/ti X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 08 Mar 2015 03:34:07 -0000 Author: ian Date: Sun Mar 8 03:34:06 2015 New Revision: 279766 URL: https://svnweb.freebsd.org/changeset/base/279766 Log: Fix spurious interrupts on arm am335x (beaglebone), by doing the EOI in both the post-filter and post-thread callbacks. Also eliminate a completely unecessary write to INTC_ISR_CLEAR register, which clears a software-generated interrupt that can only happen with a write to INTC_ISR_SET (which nothing does). Modified: head/sys/arm/ti/aintc.c Modified: head/sys/arm/ti/aintc.c ============================================================================== --- head/sys/arm/ti/aintc.c Sun Mar 8 02:47:38 2015 (r279765) +++ head/sys/arm/ti/aintc.c Sun Mar 8 03:34:06 2015 (r279766) @@ -78,6 +78,14 @@ static struct ti_aintc_softc *ti_aintc_s bus_space_write_4((_sc)->aintc_bst, (_sc)->aintc_bsh, (reg), (val)) +static void +aintc_post_filter(void *arg) +{ + + arm_irq_memory_barrier(0); + aintc_write_4(ti_aintc_sc, INTC_CONTROL, 1); /* EOI */ +} + static int ti_aintc_probe(device_t dev) { @@ -124,6 +132,8 @@ ti_aintc_attach(device_t dev) /*Set Priority Threshold */ aintc_write_4(sc, INTC_THRESHOLD, 0xFF); + arm_post_filter = aintc_post_filter; + return (0); } @@ -149,12 +159,6 @@ arm_get_next_irq(int last_irq) struct ti_aintc_softc *sc = ti_aintc_sc; uint32_t active_irq; - if (last_irq != -1) { - aintc_write_4(sc, INTC_ISR_CLEAR(last_irq >> 5), - 1UL << (last_irq & 0x1F)); - aintc_write_4(sc, INTC_CONTROL, 1); - } - /* Get the next active interrupt */ active_irq = aintc_read_4(sc, INTC_SIR_IRQ); @@ -178,6 +182,7 @@ arm_mask_irq(uintptr_t nb) struct ti_aintc_softc *sc = ti_aintc_sc; aintc_write_4(sc, INTC_MIR_SET(nb >> 5), (1UL << (nb & 0x1F))); + aintc_write_4(sc, INTC_CONTROL, 1); /* EOI */ } void