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From: Alexander Motin <mav@FreeBSD.org>
Date: Tue, 20 Dec 2011 15:19:33 +0000 (UTC)
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Subject: svn commit: r228739 - head/share/man/man4
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Author: mav
Date: Tue Dec 20 15:19:33 2011
New Revision: 228739
URL: http://svn.freebsd.org/changeset/base/228739

Log:
  s/LAPIC/local APIC/ to closer follow Intel documents.
  
  Submitted by:	jhb

Modified:
  head/share/man/man4/apic.4

Modified: head/share/man/man4/apic.4
==============================================================================
--- head/share/man/man4/apic.4	Tue Dec 20 15:19:29 2011	(r228738)
+++ head/share/man/man4/apic.4	Tue Dec 20 15:19:33 2011	(r228739)
@@ -51,20 +51,20 @@ Set this to 1 to disable APIC support, f
 .Sh DESCRIPTION
 There are two components in the Intel APIC system, the local APIC (LAPIC)
 and the I/O APIC.
-There is one LAPIC in each CPU in the system.
+There is one local APIC in each CPU in the system.
 There is typically one I/O APIC for each peripheral bus in the system.
 .Pp
-LAPICs manage all external interrupts for specific processor in an SMP system.
+Local APICs manage all external interrupts for a specific processor.
 In addition, they are able to accept and generate inter-processor interrupts
 (IPIs).
 .Pp
 I/O APICs contain a redirection table, which is used to route the interrupts
 they receive from peripheral buses to one or more local APICs.
 .Pp
-Each LAPIC includes one 32-bit programable timer.
+Each local APIC includes one 32-bit programable timer.
 This driver uses them to supply kernel with one event timer named "LAPIC".
 Event timer provided by the driver supports both one-shot an periodic modes.
-Because of LAPIC nature it is per-CPU.
+Because of local APIC nature it is per-CPU.
 The timer frequency is not reported by the platform and so automatically
 measured by the driver on the first use.
 Depending on CPU model this timer may stop in C3 and deeper CPU sleep states.