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Date:      Wed, 2 Apr 2008 22:07:43 -0500 (CDT)
From:      Nathan Whitehorn <nathanw@uchicago.edu>
To:        Marcel Moolenaar <xcllnt@mac.com>
Cc:        freebsd-ppc@freebsd.org
Subject:   Re: BMAC Ethernet Driver
Message-ID:  <Pine.GSO.4.62.0804022152590.20081@harper.uchicago.edu>
In-Reply-To: <EB224547-BCC9-4467-98E5-1D8EC0352349@mac.com>
References:  <47E06B23.7060400@uchicago.edu> <20080325023040.ab0daa19.stas@FreeBSD.org> <47E8527B.2050002@uchicago.edu> <47F39EF4.8040800@uchicago.edu> <C83E8810-B68B-49B5-A7F4-8B72A4FFFFDA@mac.com> <47F3D2BC.7060001@uchicago.edu> <47F422A0.9080907@uchicago.edu> <CB59240D-E385-4D4C-9372-E9D418502F61@mac.com> <EB224547-BCC9-4467-98E5-1D8EC0352349@mac.com>

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On Wed, 2 Apr 2008, Marcel Moolenaar wrote:

>
> On Apr 2, 2008, at 5:23 PM, Marcel Moolenaar wrote:
>
>>>> ... The real concern, on my part, for committing it is whether the macio 
>>>> IRQ patch breaks anything.
>> 
>> I'll test the patch...
>
> I doubt the patch is correct....
>
> Before:
>
> scc0: <Zilog Z8530 dual channel SCC> mem 0x13000-0x13fff,0x8400-0x84ff, 
> 0x8500-0x85ff,0x8600-0x86ff,0x8700-0x87ff irq 22,23 on macio0
> scc0: [FILTER]
> scc0: [FILTER]
> uart0: <z8530, channel A> on scc0
> uart0: [FILTER]
> uart0: console (57600,n,8,1)
> uart1: <z8530, channel B> on scc0
> uart1: [FILTER]
> ata0 mem 0x1f000-0x1ffff,0x8a00-0x8aff irq 19 on macio0
> ata0: [ITHREAD]
>
> After:
>
> scc0: <Zilog Z8530 dual channel SCC> mem 0x13000-0x13fff,0x8400-0x84ff, 
> 0x8500-0x85ff,0x8600-0x86ff,0x8700-0x87ff irq 22,1,5,0,6,0 on macio0
> scc0: [FILTER]
> scc0: [FILTER]
> uart0: <z8530, channel A> on scc0
> uart0: [FILTER]
> uart0: console (57600,n,8,1)
> uart1: <z8530, channel B> on scc0
> uart1: [FILTER]
> ata0 mem 0x1f000-0x1ffff,0x8a00-0x8aff irq 19,1,11,0 on macio0
> ata0: [ITHREAD]
>
>
> "ofwdump -aP interrupts" gives:
> 	...
>        Node 0xff95fd30: escc
>          Node 0xff95ffb8: ch-a
>            interrupts:
>              00 00 00 16 00 00 00 01 00 00 00 05 00 00 00 00 00 00 00 06
>              00 00 00 00
>          Node 0xff960a08: ch-b
>            interrupts:
>              00 00 00 17 00 00 00 01 00 00 00 07 00 00 00 00 00 00 00 08
>              00 00 00 00
> 	...
>        Node 0xff970618: ata-4
>          interrupts:
>            00 00 00 13 00 00 00 01 00 00 00 0b 00 00 00 00
>          Node 0xff973358: disk
>
>
> Can you send me the output of ofwdump on your machine?

So it looks like that corresponds to the OF output, to within the macio 
limit of 5 interrupts per device. Two of the interrupts for each channel 
(probably the first two after the main one) are the DBDMA interrupts for 
transmit and receive DMA on each UART. The others, I don't know. G4 
machines seem to have a lot of 0 interrupts listed in OF. Maybe we should
remove them? I somehow doubt that 0 is a valid IRQ.

This definitely does break the serial support, and should probably be 
reevaluated. The limit of five interrupts should be removed, certainly, 
and possibly some of the values trimmed. After that, SCC still needs to 
get the right per-channel primary interrupt, which I don't know how to do 
without hints from macio.

On my machine, there are three SCC interrupts per channel: the main 
per-channel interrupts, and the two DBDMA interrupts. None of them are 0. 
I'll send the exact output in the morning.
-Nathan




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