From owner-freebsd-arm@FreeBSD.ORG Sat Mar 31 15:28:42 2007 Return-Path: X-Original-To: freebsd-arm@freebsd.org Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 60ECC16A406 for ; Sat, 31 Mar 2007 15:28:42 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from harmony.bsdimp.com (vc4-2-0-87.dsl.netrack.net [199.45.160.85]) by mx1.freebsd.org (Postfix) with ESMTP id 1E8A713C4B7 for ; Sat, 31 Mar 2007 15:28:42 +0000 (UTC) (envelope-from imp@bsdimp.com) Received: from localhost (localhost [127.0.0.1]) by harmony.bsdimp.com (8.13.8/8.13.4) with ESMTP id l2VFOM5u005907; Sat, 31 Mar 2007 09:24:23 -0600 (MDT) (envelope-from imp@bsdimp.com) Date: Sat, 31 Mar 2007 09:24:24 -0600 (MDT) Message-Id: <20070331.092424.43007518.imp@bsdimp.com> To: freebsd-arm@dino.sk From: "M. Warner Losh" In-Reply-To: <200703311533.02429.freebsd-arm@dino.sk> References: <200703311533.02429.freebsd-arm@dino.sk> X-Mailer: Mew version 4.2 on Emacs 21.3 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-2.0 (harmony.bsdimp.com [127.0.0.1]); Sat, 31 Mar 2007 09:24:23 -0600 (MDT) Cc: freebsd-arm@freebsd.org Subject: Re: ARM cross compiling question X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 31 Mar 2007 15:28:42 -0000 Make sure you define both TARGET and TARGET_ARCH to be 'arm'. I know that works, as I've done this on 6.2 and -current dozens of times. I'll take a look at -stable. Of course, I also use the 'make buildenv' target to then build kernels. In message: <200703311533.02429.freebsd-arm@dino.sk> Milan Obuch writes: : Also, I have second question - from what I looked in arm kernel configs, it : seems one needs to set following in kernel config: : : options PHYSADDR=0x10000000 : options KERNPHYSADDR=0x10200000 : options KERNVIRTADDR=0xc0200000 # Used in ldscript.arm : options FLASHADDR=0x50000000 : options LOADERRAMADDR=0x00000000 : : (taken from AVILA), but I did not find description for them. For my board, 64 : MB SDRAM is at physicall address 0x3000000. NAND flash is accessed via NAND : flash controller, somehow resembling disc access (actually, I think I try to : make it look like disc). Any help to understand these options is greatly : appreciated. This is similar the atmel parts. You'd want PHYSADDR to be 0x30000000, with all the other addresses adjusted accordingly. You'd have to see where your flash controller maps the flash memory... : If anybody already did some work with Samsung's S3C2410, I would like to know : about it. There is a NetBSD port that you can crib some code from. I've looked at the serial controller only for this board... Warner