From owner-cvs-all  Fri Mar  5 15:36:43 1999
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From: "Justin T. Gibbs" <gibbs@FreeBSD.org>
Date: Fri, 5 Mar 1999 15:35:49 -0800 (PST)
To: cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org
Subject: cvs commit: src/sys/pci ahc_pci.c src/sys/i386/eisa ahc_eisa.c
         src/sys/dev/aic7xxx aic7xxx.c aic7xxx.h aic7xxx.reg aic7xxx.seq
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gibbs       1999/03/05 15:35:49 PST

  Modified files:
    sys/pci              ahc_pci.c 
  Log:
  Add untested code to support the aha2930U2W.
  
  Modify to deal with changes in the storage of user negotiation settings.
  
  Revision  Changes    Path
  1.7       +25 -16    src/sys/pci/ahc_pci.c

  Modified files:
    sys/i386/eisa        ahc_eisa.c 
  Log:
  Modify to deal with changes in the storage of user negotiation settings.
  
  Revision  Changes    Path
  1.5       +6 -4      src/sys/i386/eisa/ahc_eisa.c

  Modified files:
    sys/dev/aic7xxx      aic7xxx.c aic7xxx.h aic7xxx.reg 
                         aic7xxx.seq 
  Log:
  Keep track of negotiated transfer parameters for each initiator<->target
  connection.
  
  Clean up support for devices featuring the multiple target SCSI ID feature.
  On aic7890/91/96/97 chips, we can now assume the target role on multiple
  target ids simultaneously.  Although these chips also have sufficient
  instruction space to hold to support the initiator and target role at the
  same time, the initiator role is currently disabled as it will conflict
  (chip design restriction) with the multi-tid feature.  I'll probably add
  a nob to enable the initiator (there-by disabling multi-tid) some time
  in the future.
  
  Return queue full or busy, depending on the tagged nature of the incoming
  request, if our command input queue fills up in host memeory.
  
  Deal with accept target I/O resource shortages.
  
  If we get an underrun on a transaction that wasn't supposed to transmit
  any data, don't attempt to print out the S/G list.  The code would
  run until hitting a non-present page. (oops)
  
  Revision  Changes    Path
  1.18      +584 -218  src/sys/dev/aic7xxx/aic7xxx.c
  1.6       +39 -35    src/sys/dev/aic7xxx/aic7xxx.h
  1.13      +8 -3      src/sys/dev/aic7xxx/aic7xxx.reg
  1.86      +36 -20    src/sys/dev/aic7xxx/aic7xxx.seq


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