From owner-freebsd-stable@FreeBSD.ORG Thu Feb 7 19:25:19 2013 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.FreeBSD.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 2FF5EB66 for ; Thu, 7 Feb 2013 19:25:19 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from bigwig.baldwin.cx (bigknife-pt.tunnel.tserv9.chi1.ipv6.he.net [IPv6:2001:470:1f10:75::2]) by mx1.freebsd.org (Postfix) with ESMTP id 0E388854 for ; Thu, 7 Feb 2013 19:25:19 +0000 (UTC) Received: from pakbsde14.localnet (unknown [38.105.238.108]) by bigwig.baldwin.cx (Postfix) with ESMTPSA id 5BD84B915; Thu, 7 Feb 2013 14:25:18 -0500 (EST) From: John Baldwin To: "Mikhail T." Subject: Re: FreeBSD-9.1 would not boot on pentium3 laptop Date: Thu, 7 Feb 2013 14:25:17 -0500 User-Agent: KMail/1.13.5 (FreeBSD/8.2-CBSD-20110714-p22; KDE/4.5.5; amd64; ; ) References: <5111DE44.7040008@aldan.algebra.com> <201302071316.29898.jhb@freebsd.org> <5113F24E.3070207@aldan.algebra.com> In-Reply-To: <5113F24E.3070207@aldan.algebra.com> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-15" Content-Transfer-Encoding: 7bit Message-Id: <201302071425.17064.jhb@freebsd.org> X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.7 (bigwig.baldwin.cx); Thu, 07 Feb 2013 14:25:18 -0500 (EST) Cc: freebsd-stable@freebsd.org X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 07 Feb 2013 19:25:19 -0000 On Thursday, February 07, 2013 1:28:30 pm Mikhail T. wrote: > On 07.02.2013 13:16, John Baldwin wrote: > > Can you get pciconf -lc output? > Here: > > hostb0@pci0:0:0:0: class=0x060000 card=0x00000000 > chip=0x11308086 rev=0x02 hdr=0x00 > cap 09[88] = vendor (length 4) Intel cap 15 version 1 > cap 02[a0] = AGP 4x 2x 1x SBA disabled Looks like you have one of the systems the comment mentions. Try this patch to see if ichss is disabled automatically for you: Index: ichss.c =================================================================== --- ichss.c (revision 246122) +++ ichss.c (working copy) @@ -67,7 +67,7 @@ struct ichss_softc { #define PCI_DEV_82801BA 0x244c /* ICH2M */ #define PCI_DEV_82801CA 0x248c /* ICH3M */ #define PCI_DEV_82801DB 0x24cc /* ICH4M */ -#define PCI_DEV_82815BA 0x1130 /* Unsupported/buggy part */ +#define PCI_DEV_82815_MC 0x1130 /* Unsupported/buggy part */ /* PCI config registers for finding PMBASE and enabling SpeedStep. */ #define ICHSS_PMBASE_OFFSET 0x40 @@ -155,9 +155,6 @@ ichss_identify(driver_t *driver, device_t parent) * E.g. see Section 6.1 "PCI Devices and Functions" and table 6.1 of * Intel(r) 82801BA I/O Controller Hub 2 (ICH2) and Intel(r) 82801BAM * I/O Controller Hub 2 Mobile (ICH2-M). - * - * TODO: add a quirk to disable if we see the 82815_MC along - * with the 82801BA and revision < 5. */ ich_device = pci_find_bsf(0, 0x1f, 0); if (ich_device == NULL || @@ -167,6 +164,22 @@ ichss_identify(driver_t *driver, device_t parent) pci_get_device(ich_device) != PCI_DEV_82801DB)) return; + /* + * Certain systems with ICH2 and an Intel 82815_MC host bridge + * where the host bridge's revision is < 5 lockup if SpeedStep + * is used. + */ + if (pci_get_device(ich_device) == PCI_DEV_82801BA) { + device_t hostb; + + hostb = pci_find_bsf(0, 0, 0); + if (hostb != NULL && + pci_get_vendor(hostb) == PCI_VENDOR_INTEL && + pci_get_device(hostb) == PCI_DEV_82815_MC && + pci_get_revid(hostb) < 5) + return; + } + /* Find the PMBASE register from our PCI config header. */ pmbase = pci_read_config(ich_device, ICHSS_PMBASE_OFFSET, sizeof(pmbase)); -- John Baldwin