From owner-freebsd-current@freebsd.org Sat May 20 09:01:59 2017 Return-Path: Delivered-To: freebsd-current@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 9AF74D752E0 for ; Sat, 20 May 2017 09:01:59 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: from asp.reflexion.net (outbound-mail-210-10.reflexion.net [208.70.210.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 60DDA10AC for ; Sat, 20 May 2017 09:01:58 +0000 (UTC) (envelope-from markmi@dsl-only.net) Received: (qmail 8520 invoked from network); 20 May 2017 09:01:57 -0000 Received: from unknown (HELO mail-cs-01.app.dca.reflexion.local) (10.81.19.1) by 0 (rfx-qmail) with SMTP; 20 May 2017 09:01:57 -0000 Received: by mail-cs-01.app.dca.reflexion.local (Reflexion email security v8.40.0) with SMTP; Sat, 20 May 2017 05:01:57 -0400 (EDT) Received: (qmail 23378 invoked from network); 20 May 2017 09:01:57 -0000 Received: from unknown (HELO iron2.pdx.net) (69.64.224.71) by 0 (rfx-qmail) with (AES256-SHA encrypted) SMTP; 20 May 2017 09:01:57 -0000 Received: from [192.168.1.106] (c-76-115-7-162.hsd1.or.comcast.net [76.115.7.162]) by iron2.pdx.net (Postfix) with ESMTPSA id 5EA73EC81B0; Sat, 20 May 2017 02:01:56 -0700 (PDT) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 10.3 \(3273\)) Subject: Re: TARGET_ARCH=powerpc head -r317820 production-style kernel: periodic panics always in pid=11 (the Idle threads) From: Mark Millard In-Reply-To: <1F50B6D9-4E41-4367-860D-E2A0E13AE661@dsl-only.net> Date: Sat, 20 May 2017 02:01:55 -0700 Cc: FreeBSD PowerPC ML , FreeBSD Current Content-Transfer-Encoding: quoted-printable Message-Id: <81F7A2D8-4C3A-426D-B957-9DC937006D88@dsl-only.net> References: <831804AB-1BEB-40C7-BA8B-94DF07E314E5@dsl-only.net> <1F50B6D9-4E41-4367-860D-E2A0E13AE661@dsl-only.net> To: Justin Hibbits , Nathan Whitehorn X-Mailer: Apple Mail (2.3273) X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 20 May 2017 09:01:59 -0000 On 2017-May-19, at 9:42 PM, Mark Millard wrote: > On 2017-May-9, at 2:00 PM, Mark Millard wrote: >=20 > . . . >> fatal kernel trap: >> exception =3D 0x903a64e (unknown) >> srr0 =3D 0x7ff760 >> srr1 =3D 0xc1007c >> lr =3D 0x907f >> curthread =3D 0x147d6c0 >> pid =3D 11, comm =3D idle: cpu0 >> [ thread pid 11 tid 100003 ] >> Stopped at ffs_truncate+0x1080: stw r11, 0xf8(r31) >>=20 >> 1 contains (cpu1 instead of cpu0, so different tid): >>=20 >> fatal kernel trap: >> exception =3D 0x903a64e (unknown) >> srr0 =3D 0x7ff760 >> srr1 =3D 0xc1007c >> lr =3D 0x907f >> curthread =3D 0x147d360 >> pid =3D 11, comm =3D idle: cpu1 >> [ thread pid 11 tid 100004 ] >> Stopped at ffs_truncate+0x1080: stw r11, 0xf8(r31) >>=20 >> 1 contains: >=20 > I've discovered where to find the trapframe > in the vmcore.* files for these specific > examples with 0x903a64e as the exception > and such. >=20 > In the vmcore the memory image starts at > byte offset 0x1000. >=20 > To see the values reported the only > place in the image file to start that > produces those values at the offsets > for in side the powerpc trapframe is: >=20 > offset 0x1001 in the vmcore.* file. >=20 > So memory address 0x1 is being used > as the trapframe address when that > odd exception information is being > displayed. Yep: misaligned. >=20 > The decoding is not of the actual > trapframe: it is garbage that is > not to be believed. >=20 >=20 > Note: I lucked out after the above and > got a somewhat different odd trap information > that lead to actually getting a backtrace > that included the actual pid 11 cpu 1 kernel > thread stack bt associated with that odd > information display. Typo: That should have been "cpu 2". > I'll send a separate reply for that information > as it will take some transcribing from camera > pictures and such. As indicated, I got a different odd trap report that gave a backtrace. . . fatal user trap exception =3D 0x4210000 (unknown) srr0 =3D 0xc1007c09 srr1 =3D 0x3a64e80 lr =3D 0xc0807fc9 curthread =3D 0x147d000 pid =3D 11, comm =3D idle: cpu 2 Now at this point it attempted to db_print_loc_and_inst and got another exception (at offset +0x60 in the routine). So the backtrace has both the consequences of that and what lead up to that: an EXI trap was attempting to report trap frame information but was using a bad address for the supposed frame. The details of the backtrace: panic: data storage interrupt trap cpuid =3D 2 time =3D 145187154 KDB: stack backtrace 0xdf5ef2c0: at kdb_backtrace+0x5c 0xdf5ef3a0: at panic+0x54 0xdf5ef3f0: at trap_fatal+0x1cc 0xdf5ef420: at powerpc_interrupt+0x180 0xdf5ef5c0: kernel DSI read trap @ 0xc1007c09 by db_disasm+0x30: srr1=3D0x1032 r1 =3D0xdf5ef6b0 cr =3D0x24009022 xer =3D0 ctr =3D0x1852cc sr =3D0x40000000 0xdf5ef6b0: at 0x1007480 0xdf5ef6d0: at db_print_loc_and_inst+0x60 0xdf5ef700: at db_trap+0x104 0xdf5ef790: at kdb_trap+0x1bc 0xdf5ef810: at trap_fatal+0x1b0 0xdf5ef840: at trap+0x1184 0xdf5ef870: kernel EXI trap by cpu_idle_60x+0x88: srr1=3D0x1032 r1 =3D0xdf5ef930 cr =3D0x40000042 xer =3D0x20000000 ctr =3D0x8e3bd8 saved LR(0x2) is invalid. So an EXI trap was attempting to report a trap frame. (Note: the LR's for pid 11 cpu threads normally report an invalid LR in ddb.) The actual EXI trapframe starts at 013f0878 in vmcore.5: 013f0870 df 5e f9 30 00 10 08 f8 00 04 90 32 df 5e f9 30 = |.^.0.......2.^.0| 013f0880 01 47 d0 00 00 00 00 00 25 94 48 3f 00 00 00 00 = |.G......%.H?....| 013f0890 25 94 48 3f 00 4a a9 c8 00 00 00 00 00 00 00 44 = |%.H?.J.........D| 013f08a0 01 fc a0 55 00 00 90 32 df 5d 1d 00 00 00 00 00 = |...U...2.]......| 013f08b0 00 d4 bd ec 00 cb 98 98 00 c9 66 bc 00 c4 5d 08 = |..........f...].| 013f08c0 00 c9 66 bc 00 d4 c5 3c df 5e f9 e0 00 eb a7 80 = |..f....<.^......| 013f08d0 00 c9 66 bc 01 47 d0 00 df 5e f9 8c 00 00 00 06 = |..f..G...^......| 013f08e0 00 00 00 06 00 eb b5 80 00 00 00 00 00 8e 3b d8 = |..............;.| 013f08f0 00 d2 6b f0 df 5e f9 30 00 8e 3b f4 40 00 00 42 = |..k..^.0..;.@..B| 013f0900 20 00 00 00 00 8e 3b d8 00 8e 3c 60 00 00 90 32 | = .....;...<`...2| 013f0910 00 00 05 00 41 a1 d5 d4 42 00 00 00 00 00 00 00 = |....A...B.......| So: r0 =3D 0x00049032 r1 =3D 0xdf5ef930 r2 =3D 0x0147d000 r3 =3D 0x00000000 r4 =3D 0x2594483f r5 =3D 0x00000000 r6 =3D 0x2594483f r7 =3D 0x004aa9c8 r8 =3D 0x00000000 r9 =3D 0x00000044 r10 =3D 0x01fca055 r11 =3D 0x00009032 r12 =3D 0xdf5d1d00 r13 =3D 0x00000000 r14 =3D 0x00d4bdec r15 =3D 0x00cb9898 r16 =3D 0x00c966bc r17 =3D 0x00c45d08 r18 =3D 0x00c966bc r19 =3D 0x00d4c53c r20 =3D 0xdf5ef9e0 r21 =3D 0x00eba780 r22 =3D 0x00c966bc r23 =3D 0x1047d000 r24 =3D 0xdf5ef98c r25 =3D 0x00000006 (this value shows up later in a bad spot) r26 =3D 0x00000006 (this value shows up next to that) r27 =3D 0x00ebb580 r28 =3D 0x00000000 r29 =3D 0x008e3bd8 r30 =3D 0x00d26bf0 r31 =3D 0xdf5ef930 lr =3D 0x008e3bf4 cr =3D 0x40000042 xer =3D 0x20000000 ctr =3D 0x008e3bd8 srr0 =3D 0x008e3c60 srr1 =3D 0x00009032 exc =3D 0x00000500 dar =3D 0x41a1d5d4 dsisr =3D 0x42000000 Other elements of the stack leading to this are: 013f0920 45 8b a7 b5 b1 fd 96 be 00 00 00 00 00 00 00 04 = |E...............| 013f0930 df 5e f9 50 00 00 00 06 00 00 00 06 00 eb b5 80 = |.^.P............| (odd lr value; value repeats above, not ; here. r25/r26 a multiple ; pair saved of 4 even. ; in those? matches r25 ; matches r26 in trapframe; in trapframe) 013f0940 00 00 00 00 00 d4 ca 34 00 d2 6b f0 df 5e f9 50 = |.......4..k..^.P| 013f0950 df 5e f9 70 00 8e 31 7c 00 00 00 02 00 eb b5 80 = |.^.p..1|........| 013f0960 00 f2 d5 fc 00 00 00 06 00 d1 ca ac df 5e f9 70 = |.............^.p| 013f0970 df 5e fa 50 00 53 6e 58 df 5e f9 80 00 00 00 00 = |.^.P.SnX.^......| . . . 013f0a50 df 5e fa 80 00 4a 3c b4 df 5e fa 60 fa 50 05 af = |.^...J<..^.`.P..| 013f0a60 df 5e fa 80 00 00 00 00 00 00 00 00 00 00 00 00 = |.^..............| 013f0a70 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 = |................| 013f0a80 00 00 00 00 00 8f 18 90 00 53 69 84 00 00 00 00 = |.........Si.....| =46rom which I get from the stack backpointer/lr-value pairs(via objdump on the kernel): 00000006: ???????????????????? 008e317c: cpu_idle+0x58 00536e58: scheduletd+0x4d4 004a3cb4: fork_exit+0xf8 008f1890: fork_trampoline+0x10 But cpu_idle+0x58 is the bl ,cpu_activeclock> in the below and the prior bctrl after the bl is what made the call. 008e3124 stwu r1,-32(r1) 008e3128 mflr r0 008e312c stw r29,20(r1) 008e3130 stw r30,24(r1) 008e3134 stw r31,28(r1) 008e3138 stw r0,36(r1) 008e313c mr r31,r1 008e3140 bcl- 20,4*cr7+so,008e3144 008e3144 mflr r30 008e3148 lwz r0,-36(r30) 008e314c add r30,r0,r30 008e3150 lwz r29,-32768(r30) 008e3154 lwz r0,0(r29) 008e3158 cmpwi cr7,r0,0 008e315c beq- cr7,008e3198 008e3160 cmpwi cr7,r3,0 008e3164 bne- cr7,008e3188 008e3168 bl 005002a4 008e316c bl 008ad894 008e3170 lwz r29,0(r29) 008e3174 mtctr r29 008e3178 bctrl 008e317c bl 008ad794 But ctr was reported as: 0x8e3bd8 which is cpu_idle_60x. (So no surprises so far.) The code through the reported cpu_idle_60x+0x88 is: 008e3bd8 stwu r1,-32(r1) 008e3bdc mflr r0 008e3be0 stw r30,24(r1) 008e3be4 stw r31,28(r1) 008e3be8 stw r0,36(r1) 008e3bec mr r31,r1 008e3bf0 bcl- 20,4*cr7+so,008e3bf4 = 008e3bf4 mflr r30 008e3bf8 lwz r0,-32(r30) 008e3bfc add r30,r0,r30 008e3c00 lwz r9,-32756(r30) 008e3c04 lwz r0,0(r9) 008e3c08 cmpwi cr7,r0,0 008e3c0c beq- cr7,008e3c78 008e3c10 mfmsr r11 008e3c14 mfsprg r0,7 008e3c18 rlwinm r9,r0,16,16,31 008e3c1c cmpwi cr7,r9,68 008e3c20 beq- cr7,008e3c4c 008e3c24 cmplwi cr7,r9,68 008e3c28 bgt- cr7,008e3c40 008e3c2c cmpwi cr7,r9,57 008e3c30 beq- cr7,008e3c4c 008e3c34 cmpwi cr7,r9,60 008e3c38 bne+ cr7,008e3c64 008e3c3c b 008e3c4c 008e3c40 addi r0,r9,-32768 008e3c44 cmplwi cr7,r0,4 008e3c48 bgt- cr7,008e3c64 008e3c4c oris r0,r11,4 008e3c50 dssall 008e3c54 sync =20 008e3c58 mtmsr r0 008e3c5c isync 008e3c60 b 008e3c78 So that is the context for the EXI trap. The "mtsmr r0" merged in PSL_POW to the msr value when it was originally not set. (r11 vs. r0 value comparison in the trapframe.) Why it would be going from without POW for so long and then merging in POW I do not know. (Or may be I just did not find code that turns POW back off on occasion.) Still setting POW in msr seems to be what is unique to the failure context. Mkes me wonder if smu_doorbell_intr and its irq is somehow involved. There is no obvious, local tie to r25 and r26 in/for the spots identified earlier for the 013f0930 line of the thread stack area. Interestingly when I looked up POW in mtsmsr use what I found reported: Synchronization Required Prior: implementation dependent Synchronization Required After: implementation dependent The source code looks like: static void cpu_idle_60x(sbintime_t sbt) { register_t msr; uint16_t vers; if (!powerpc_pow_enabled) return; msr =3D mfmsr(); vers =3D mfpvr() >> 16; #ifdef AIM switch (vers) { case IBM970: case IBM970FX: case IBM970MP: case MPC7447A: case MPC7448: case MPC7450: case MPC7455: case MPC7457: __asm __volatile("\ dssall; sync; mtmsr %0; isync" :: "r"(msr | PSL_POW)); break; default: powerpc_sync(); mtmsr(msr | PSL_POW); isync(); break; } #endif } I've not yet figured out how to check that the details are right here for IBM970MP used via 32-bit FreeBSD. =3D=3D=3D Mark Millard markmi at dsl-only.net