From nobody Wed May 28 13:35:02 2025 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4b6r8k4bTdz5xVfF; Wed, 28 May 2025 13:35:02 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R11" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4b6r8k2lqJz3M2G; Wed, 28 May 2025 13:35:02 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1748439302; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=aYL6/SGjof9Z1dxF8vz5WUdgE86yy1nUwUbHjnpOHIg=; b=Z6spGr3qR6NZaHiFlt193+UoWbBJK4XHD5ekfdH0LTg+KBnpims5Lvy+Xx4XMul7/uqp55 i1hkXyI4+cx4/fiitgGEMG99Rc6N9rzsl6VdtdDXAuLp1rdzMOBAM+RmYRFgSAXnZ8o5xL ZUr/5/AtbHY+7YQwLA6WAYdV8TtKu7ptH4cCXeeP4t0xX9cIzty8afeAEI/yYkjmH4Q6o0 kms/SNSn5pgj+y3bqxjF6Fj4dmNDKfCs9YJ7eyQOn/JVuih8J5fzVvzAFtJh4TBqnvqcEH fbMABBjnBogRYCdCh+roeLzu6dMuqdbxvMNlHQokIf/F/BdavfGD1HHL9i/Ucw== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1748439302; a=rsa-sha256; cv=none; b=YiQgxhoO2+yCUOo/w+HLN/Z3hDn9jHTO2ADVVlSJeAKd9Nk4suh2bm9Mn3h3Sna3Qn6pBS WXDrwc84e5ikW+tAfbN4DC6seTC4zO6xPGFVw7ubZfuRNxVzPK1qe5uuvAnzUrKERrT+XQ 1gE3eW7TrgSIrhTFhGDGyBCZ9oxRnfLulITpFou/9LPReYAYdm2rnqcW9M6rrZkZ4BqTGn HsrhQF89h2OVZx7/+lWWJyi2waN1JnW9eDtK7haxXOmpGgr2VsX02pr6SuXmroNczogn63 VPW6/YdyhDQJN7f2WNPdKaMlnVuoBo60oDZ2GSjKvn7vvV39BrjvvNdkMiojGQ== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1748439302; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=aYL6/SGjof9Z1dxF8vz5WUdgE86yy1nUwUbHjnpOHIg=; b=GZCrTa673IG6kgz1/jDYmRJqdLrPu+zyIohyDCvG4rB89hrddKQjh10BB+6xXb4udHgrd7 pXQ4aoLIXwcJOagGwjLTXuUNb2uRKUtkKInnI80b3E1FIaYeaNJsxXkHITFH1RX/b2iGq2 M+ocllMZ268tnbA+5A/mPlYSul7UH4vY3UUAa66eKwjdrA2r5N2VUCnIoKOa1H/fho41l5 yE49QaDBSnjfFKDiKxVsfc1G+vHsQLTVrHypCH76yuXQ7Epnz6CVG0yMrT83XmZKyr3iXD bYaRQJPcD6G47fV6llg0P/Q3JQz/lkimzd/ndlLbVSHZW0BH7yWlx1LxgF1KhA== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4b6r8k2HYkzgZs; Wed, 28 May 2025 13:35:02 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.18.1/8.18.1) with ESMTP id 54SDZ2v3017525; Wed, 28 May 2025 13:35:02 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.18.1/8.18.1/Submit) id 54SDZ2Wd017522; Wed, 28 May 2025 13:35:02 GMT (envelope-from git) Date: Wed, 28 May 2025 13:35:02 GMT Message-Id: <202505281335.54SDZ2Wd017522@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Andrew Turner Subject: git: 77d5df3b9261 - main - arm64: Move CPU feature & errata setup earlier List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-main@freebsd.org Sender: owner-dev-commits-src-main@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: andrew X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 77d5df3b9261173f10afb7ba739f98c62a41395f Auto-Submitted: auto-generated The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=77d5df3b9261173f10afb7ba739f98c62a41395f commit 77d5df3b9261173f10afb7ba739f98c62a41395f Author: Andrew Turner AuthorDate: 2025-05-27 19:39:20 +0000 Commit: Andrew Turner CommitDate: 2025-05-27 19:50:11 +0000 arm64: Move CPU feature & errata setup earlier To allow for the state of some errata to be detected we need devices, e.g. to call into the SMCCC firmware. Because of this we need to check this after devices drivers are ready. As the presence of this errata may require us to mask out some fields from the ID register views, and these register views are used to build the userspace hwcap values and used in late kernel ifunc resolvers we need to ensure they have run by a known point. Add a synchronisation point for APs at SI_SUB_CONFIGURE, SI_ORDER_MIDDLE + 1. This is early enough that we can move setting the hwcap values just after this, and late enough for devices to be present. Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D50367 --- sys/arm64/arm64/mp_machdep.c | 39 ++++++++++++++++++++++++++++++++++----- 1 file changed, 34 insertions(+), 5 deletions(-) diff --git a/sys/arm64/arm64/mp_machdep.c b/sys/arm64/arm64/mp_machdep.c index 88d48bceb892..e4d011df3a06 100644 --- a/sys/arm64/arm64/mp_machdep.c +++ b/sys/arm64/arm64/mp_machdep.c @@ -124,7 +124,7 @@ static void *bootstacks[MAXCPU]; static volatile int aps_started; /* Set to 1 once we're ready to let the APs out of the pen. */ -static volatile int aps_ready; +static volatile int aps_after_dev, aps_ready; /* Temporary variables for init_secondary() */ static void *dpcpu[MAXCPU - 1]; @@ -160,6 +160,26 @@ wait_for_aps(void) return (false); } +static void +release_aps_after_dev(void *dummy __unused) +{ + /* Only release CPUs if they exist */ + if (mp_ncpus == 1) + return; + + atomic_store_int(&aps_started, 0); + atomic_store_rel_int(&aps_after_dev, 1); + /* Wake up the other CPUs */ + __asm __volatile( + "dsb ishst \n" + "sev \n" + ::: "memory"); + + wait_for_aps(); +} +SYSINIT(aps_after_dev, SI_SUB_CONFIGURE, SI_ORDER_MIDDLE + 1, + release_aps_after_dev, NULL); + static void release_aps(void *dummy __unused) { @@ -237,8 +257,20 @@ init_secondary(uint64_t cpu) /* Detect early CPU feature support */ enable_cpu_feat(CPU_FEAT_EARLY_BOOT); - /* Signal the BSP and spin until it has released all APs. */ + /* Signal we are waiting for aps_after_dev */ atomic_add_int(&aps_started, 1); + + /* Wait for devices to be ready */ + while (!atomic_load_int(&aps_after_dev)) + __asm __volatile("wfe"); + + install_cpu_errata(); + enable_cpu_feat(CPU_FEAT_AFTER_DEV); + + /* Signal we are done */ + atomic_add_int(&aps_started, 1); + + /* Wait until we can run the scheduler */ while (!atomic_load_int(&aps_ready)) __asm __volatile("wfe"); @@ -253,9 +285,6 @@ init_secondary(uint64_t cpu) ("pmap0 doesn't match cpu %ld's ttbr0", cpu)); pcpup->pc_curpmap = pmap0; - install_cpu_errata(); - enable_cpu_feat(CPU_FEAT_AFTER_DEV); - intr_pic_init_secondary(); /* Start per-CPU event timers. */