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From: Jung-uk Kim <jkim@FreeBSD.org>
Date: Mon, 22 Jun 2020 20:42:58 +0000 (UTC)
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Subject: svn commit: r362509 - head/sys/x86/x86
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Author: jkim
Date: Mon Jun 22 20:42:58 2020
New Revision: 362509
URL: https://svnweb.freebsd.org/changeset/base/362509

Log:
  Assume all TSCs are synchronized for AMD Family 17h processors and later
  when it has passed the synchronization test.
  
  "Processor Programming Reference (PPR) for AMD Family 17h" states that
  the TSC uses a common reference for all sockets, cores and threads.
  
  MFC after:	1 month

Modified:
  head/sys/x86/x86/tsc.c

Modified: head/sys/x86/x86/tsc.c
==============================================================================
--- head/sys/x86/x86/tsc.c	Mon Jun 22 19:15:50 2020	(r362508)
+++ head/sys/x86/x86/tsc.c	Mon Jun 22 20:42:58 2020	(r362509)
@@ -526,6 +526,13 @@ retry:
 		case CPU_VENDOR_AMD:
 		case CPU_VENDOR_HYGON:
 			/*
+			 * Processor Programming Reference (PPR) for AMD
+			 * Family 17h states that the TSC uses a common
+			 * reference for all sockets, cores and threads.
+			 */
+			if (CPUID_TO_FAMILY(cpu_id) >= 0x17)
+				return (1000);
+			/*
 			 * Starting with Family 15h processors, TSC clock
 			 * source is in the north bridge.  Check whether
 			 * we have a single-socket/multi-core platform.