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From: Adrian Chadd <adrian@FreeBSD.org>
Date: Tue, 18 Oct 2011 03:32:18 +0000 (UTC)
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Subject: svn commit: r226491 - head/sys/dev/ath
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Author: adrian
Date: Tue Oct 18 03:32:18 2011
New Revision: 226491
URL: http://svn.freebsd.org/changeset/base/226491

Log:
  Add in a currently-disabled WAR for PCI NICs.
  
  Some earlier series (~AR5212?) play badly with BIOSes.
  
  In these instances, they may require a forced reset (by transitioning
  the NIC through D0 -> D3 -> D0) before they probe/attach correctly.
  
  This is currently disabled because:
  
  * I haven't figured out the "right" code to ensure this only happens
    for PCI NICs (not PCIe or Cardbus);
  * I haven't at all done wide scale testing for this, and I'm not yet
    ready for said wide-scale testing.
  
  I'm documenting this primarily so users with misbehaving NICs have
  something to tinker with.
  
  Obtained from:	Atheros

Modified:
  head/sys/dev/ath/if_ath_pci.c

Modified: head/sys/dev/ath/if_ath_pci.c
==============================================================================
--- head/sys/dev/ath/if_ath_pci.c	Tue Oct 18 03:24:17 2011	(r226490)
+++ head/sys/dev/ath/if_ath_pci.c	Tue Oct 18 03:32:18 2011	(r226491)
@@ -73,10 +73,27 @@ struct ath_pci_softc {
 
 #define	BS_BAR	0x10
 #define	PCIR_RETRY_TIMEOUT	0x41
+#define	PCIR_CFG_PMCSR		0x48
 
 static void
 ath_pci_setup(device_t dev)
 {
+	/* Override the system latency timer */
+	pci_write_config(dev, PCIR_LATTIMER, 0x80, 1);
+
+	/* If a PCI NIC, force wakeup */
+#ifdef	ATH_PCI_WAKEUP_WAR
+	/* XXX TODO: don't do this for non-PCI (ie, PCIe, Cardbus!) */
+	if (1) {
+		uint16_t pmcsr;
+		pmcsr = pci_read_config(dev, PCIR_CFG_PMCSR, 2);
+		pmcsr |= 3;
+		pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2);
+		pmcsr &= ~3;
+		pci_write_config(dev, PCIR_CFG_PMCSR, pmcsr, 2);
+	}
+#endif
+
 	/*
 	 * Disable retry timeout to keep PCI Tx retries from
 	 * interfering with C3 CPU state.