From owner-freebsd-arm@freebsd.org Mon Jul 6 16:07:58 2020 Return-Path: Delivered-To: freebsd-arm@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id B72DA36B498 for ; Mon, 6 Jul 2020 16:07:58 +0000 (UTC) (envelope-from dan.kotowski@a9development.com) Received: from mail-40136.protonmail.ch (mail-40136.protonmail.ch [185.70.40.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "protonmail.com", Issuer "SwissSign Server Gold CA 2014 - G22" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4B0r7x6Dkzz4Dmf for ; Mon, 6 Jul 2020 16:07:57 +0000 (UTC) (envelope-from dan.kotowski@a9development.com) Date: Mon, 06 Jul 2020 16:07:52 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=a9development.com; s=protonmail; t=1594051674; bh=NqCaPA8WjkMNVjEZ7PrDXDjj1gHq81VvZhhuozgkciM=; h=Date:To:From:Cc:Reply-To:Subject:In-Reply-To:References:From; b=UmdHh/HTVFyEIZvVP2nGIjB6t8PBkEbxVAdwGM0evTKyDutP36n4QjAVrx2WzMLVC ZpWNKadVvsBoVBvr8h7yn8XnoQ5SPTeQtbdq4DfYw5aYstGNMR+6EDSd0/KW3tyC3r acCOwfieIshr0bfIN2DFJrnDePz+MsJY62XdDLnE= To: "greg@unrelenting.technology" From: Dan Kotowski Cc: freebsd-arm Reply-To: Dan Kotowski Subject: Re: FreeBSD on Layerscape/QorIQ LX2160X Message-ID: <82UUBttUqS5j5wotn5ibAhp3w3JveSof3dsBLqW68NkaOu1xc6txd62UJeyJgV6hk9mLNYqhAJDyEej_PPtiv_ps9vROdUI529pKfxp4lbs=@a9development.com> In-Reply-To: <8a3f78ddd5136ef22c59e9f7b1b23ca6@unrelenting.technology> References: =?us-ascii?Q?_=5F=5F=5F=5F=5F<71481BF5-3972-45A3-8287-FCEB1FCCDC41@unrelenting.technology>_____<8a3f78ddd5136ef22c59e9f7b1b23ca6@unrelenting.technology>?= MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Spam-Status: No, score=-1.2 required=7.0 tests=ALL_TRUSTED,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF shortcircuit=no autolearn=disabled version=3.4.4 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on mail.protonmail.ch X-Rspamd-Queue-Id: 4B0r7x6Dkzz4Dmf X-Spamd-Bar: --- Authentication-Results: mx1.freebsd.org; dkim=pass header.d=a9development.com header.s=protonmail header.b=UmdHh/HT; dmarc=pass (policy=none) header.from=a9development.com; spf=pass (mx1.freebsd.org: domain of dan.kotowski@a9development.com designates 185.70.40.136 as permitted sender) smtp.mailfrom=dan.kotowski@a9development.com X-Spamd-Result: default: False [-3.75 / 15.00]; HAS_REPLYTO(0.00)[dan.kotowski@a9development.com]; TO_DN_EQ_ADDR_SOME(0.00)[]; R_DKIM_ALLOW(-0.20)[a9development.com:s=protonmail]; REPLYTO_EQ_FROM(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; R_SPF_ALLOW(-0.20)[+ip4:185.70.40.0/24]; NEURAL_HAM_LONG(-0.99)[-0.985]; MIME_GOOD(-0.10)[text/plain]; ARC_NA(0.00)[]; TO_MATCH_ENVRCPT_SOME(0.00)[]; DKIM_TRACE(0.00)[a9development.com:+]; RCPT_COUNT_TWO(0.00)[2]; DMARC_POLICY_ALLOW(-0.50)[a9development.com,none]; NEURAL_HAM_SHORT(-0.65)[-0.653]; NEURAL_HAM_MEDIUM(-1.01)[-1.014]; RCVD_COUNT_ZERO(0.00)[0]; FROM_EQ_ENVFROM(0.00)[]; MIME_TRACE(0.00)[0:+]; RWL_MAILSPIKE_VERYGOOD(0.00)[185.70.40.136:from]; ASN(0.00)[asn:62371, ipnet:185.70.40.0/24, country:CH]; MID_RHS_MATCH_FROM(0.00)[]; RCVD_IN_DNSWL_LOW(-0.10)[185.70.40.136:from] X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 06 Jul 2020 16:07:58 -0000 > > In the old firmware, under the Root Complex Nodes, `Output reference: 0= x30` points to the ITS Node > > with node offset 0x30. > > Then in the new firmware, under the Root Copmlex Nodes, `Output referen= ce: 0x48` points to the SMMU with node offset 0x48. > > Is this what you meant when you said everything is "behind the SMMU"? > > Yes. > > > What patches are we applying right now? I think some new builds would b= e good, including one with > > all the stuff we've fixed - like AHCI - but with the NXP PCIe code so I= can test on the old > > firmware. If I'm keeping track correctly, this includes: > > > > - D20835: enable tagged pointers > > - D20974: Port sbsawdt drive from NetBSD > > - D21017: armv8crypto: add AES-XTS support > > - D24423: arm/pmu: add ACPI attachment, more FDT names > > These are not directly related to running on NXP, just random improvement= s :) > > > - D25145: acpi_resource: support multiple IRQs > > - D25157: ahci_generic: add quirk for NXP0004 > > - D25179: acpi_iort: fix mapping end calculation > > Yes, these three. > > Here's the pci_layerscape patch: > > https://github.com/DankBSD/base/commit/c1ea44aa33b29f74daed89eee82b3dfeb1= 05d376.patch > > If we haven't tried it + acpi_iort fix before, which is quite likely, may= be that's a combination that would work. > (I remember when we tried it only, there was only the same interrupt prob= lem as usual..) > > It's honestly kinda weird that "old" FW requires the custom controller ac= cess while "new" FW requires not doing it >_< Any tips on where to add verbosity to dmesg during boot? You had a handful = of extras in there to print things things from the IORT. Also seeing that N= VMe hangs in nvme_ctrlr_start_config_hook, maybe we want to add some verbos= ity to sys/dev/nvme/nvme_ctrlr.c to see what it's waiting for? Also worth sharing, it looks like NXP's reference board also puts the root = complexes behind the SMMU, so that's coming from further upstream, not SR. https://source.codeaurora.org/external/qoriq/qoriq-components/edk2-platform= s/tree/Platform/NXP/LX2160aRdbPkg/AcpiTables/Iort.aslc?h=3DLX2160_UEFI_ACPI= _EAR3